H8SXSLASH1663 datasheet(814/1158 Pages) RENESAS

部件名	H8SX/1663

功能描述	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1158 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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814 / 1158 page

Section 16 USB Function Module (USB)

Rev.1.00 Jun. 07, 2006 Page 762 of 1102

REJ09B0294-0100

16.3.7

Interrupt Enable Register 0 (IER0)

IER0 enables the interrupt requests of interrupt flag register 0 (IFR0). When an interrupt flag is set

to 1 while the corresponding bit of each interrupt is set to 1, an interrupt request is sent to the

CPU. The interrupt vector number is determined by the contents of interrupt select register 0

(ISR0).

Bit

Bit Name

Initial Value

R/W

BRST

R/W

EP1 FULL

R/W

EP2 TR

R/W

EP2 EMPTY

R/W

SETUP TS

R/W

EP0o TS

R/W

EP0i TR

R/W

EP0i TS

R/W

Bit

Bit Name

Initial

Value

R/W

Description

BRST

R/W

Bus Reset

EP1 FULL

R/W

EP1 FIFO Full

EP2 TR

R/W

EP2 Transfer Request

EP2 EMPTY

R/W

EP2 FIFO Empty

SETUP TS

R/W

Setup Command Receive Complete

EP0o TS

R/W

EP0o Receive Complete

EP0i TR

R/W

EP0i Transfer Request

EP0i TS

R/W

EP0i Transmission Complete

H8SX/1663 数据表(PDF) 814 Page - Renesas Technology Corp

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