H8SXSLASH1663 datasheet(904/1158 Pages) RENESAS

部件名	H8SX/1663

功能描述	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1158 Pages

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制造商	RENESAS [Renesas Technology Corp]

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Section 18 A/D Converter

Rev.1.00 Jun. 07, 2006 Page 852 of 1102

REJ09B0294-0100

18.3.1

A/D Data Registers A to H (ADDRA to ADDRH)

There are eight 16-bit read-only ADDR registers, ADDRA to ADDRH, used to store the results of

A/D conversion. The ADDR registers, which store a conversion result for each channel, are shown

in table 18.2.

The converted 10-bit data is stored in bits 15 to 6. The lower 6-bit data is always read as 0.

The data bus between the CPU and the A/D converter has a 16-bit width. The data can be read

directly from the CPU. ADDR must not be accessed in 8-bit units and must be accessed in 16-bit

units.



Bit

Bit Name

Initial Value

R/W

Table 18.2

Analog Input Channels and Corresponding ADDR Registers

Analog Input Channel

A/D Data Register Which Stores Conversion Result

AN0

ADDRA

AN1

ADDRB

AN2

ADDRC

AN3

ADDRD

AN4

ADDRE

AN5

ADDRF

AN6

ADDRG

AN7

ADDRH

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