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H8SX/1663 数据表(PDF) 907 Page - Renesas Technology Corp

部件名 H8SX/1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX/1663 数据表(HTML) 907 Page - Renesas Technology Corp

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Section 18 A/D Converter
Rev.1.00 Jun. 07, 2006 Page 855 of 1102
REJ09B0294-0100
18.3.3
A/D Control Register (ADCR)
ADCR enables A/D conversion to be started by an external trigger input.
7
TRGS1
0
R/W
6
TRGS0
0
R/W
5
SCANE
0
R/W
4
SCANS
0
R/W
3
CKS1
0
R/W
2
CKS0
0
R/W
1
0
R
0
0
R
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial
Value
R/W
Description
7
6
TRGS1
TRGS0
0
0
R/W
R/W
Timer Trigger Select 1 and 0
These bits select enabling or disabling of the start of A/D
conversion by a trigger signal.
00: A/D conversion start by external trigger is disabled
01: A/D conversion start by external trigger from TPU is
enabled
10: A/D conversion start by external trigger from TMR is
enabled
11: A/D conversion start by the
ADTRG0 pin is enabled*
5
4
SCANE
SCANS
0
0
R/W
R/W
Scan Mode
These bits select the A/D conversion operating mode.
0X: Single mode
10: Scan mode. A/D conversion is performed
continuously for channels 1 to 4.
11: Scan mode. A/D conversion is performed
continuously for channels 1 to 8.
3
2
CKS1
CKS0
0
0
R/W
R/W
Clock Select 1 and 0
These bits set the A/D conversion time. Set bits CKS1
and CKS0 only while A/D conversion is stopped (ADST =
0).
00: A/D conversion time = 530 states (max)
01: A/D conversion time = 266 states (max)
10: A/D conversion time = 134 states (max)
11: A/D conversion time = 68 states (max)



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