H8SXSLASH1663 datasheet(964/1158 Pages) RENESAS

964 / 1158 page

Section 21 Flash Memory (0.18-

µm F-ZTAT Version)

Rev.1.00 Jun. 07, 2006 Page 912 of 1102

REJ09B0294-0100

(1) On-Chip RAM Address Map when Programming/Erasing is Executed

Parts of the procedure program that is made by the user, like download request,

programming/erasing procedure, and decision of the result, must be executed in the on-chip RAM.

Since the on-chip program to be downloaded is embedded in the on-chip RAM, make sure the on-

chip program and procedure program do not overlap. Figure 21.12 shows the area of the on-chip

program to be downloaded.

H'FFBFFF

Programming/erasing

program entry

System use area

(15 bytes)

DPFR

(Return value: 1 byte)

FTDAR setting

FTDAR setting + 32 bytes

FTDAR setting + 16 bytes

Initialization program

entry

Initialization +

programming program

Initialization +

erasing program

RAM emulation area or

area that can be used

by user

Area that can be used

by user

Area to be

downloaded

(size: 4 kbytes)

Unusable area during

programming/erasing

FTDAR setting + 4 kbytes

Figure 21.12 RAM Map when Programming/Erasing is Executed

H8SX/1663 数据表(PDF) 964 Page - Renesas Technology Corp

H8SX/1663 数据表(HTML) 964 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载