H8SXSLASH1663 datasheet(965/1158 Pages) RENESAS

部件名	H8SX/1663

功能描述	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1158 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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965 / 1158 page

Section 21 Flash Memory (0.18-

µm F-ZTAT Version)

Rev.1.00 Jun. 07, 2006 Page 913 of 1102

REJ09B0294-0100

(2) Programming Procedure in User Program Mode

The procedures for download of the on-chip program, initialization, and programming are shown

in figure 21.13.

Select on-chip program

to be downloaded and

specify download

destination by FTDAR

Set FKEY to H'A5

Set SCO to 1 after initializing

VBR and execute download

DPFR

= 0?

Yes

Download error processing

Set the FPEFEQ

parameter

Yes

End programming

procedure program

FPFR

= 0?

Disable interrupts and bus

master operation

other than CPU

Clear FKEY to 0

Programming

JSR FTDAR setting

+ 16

Yes

FPFR

= 1?

Clear FKEY and

programming

error processing

Yes

Required data

programming is

completed?

Set FKEY to H'5A

Clear FKEY to 0

10.

11.

12.

13.

14.

15.

Initialization

JSR FTDAR setting

+ 32

Initialization error processing

Set parameters to ER1

and ER0

(FMPAR and FMPDR)

Start programming

procedure program

Figure 21.13 Programming Procedure in User Program Mode

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