H8SXSLASH1663 datasheet(1014/1158 Pages) RENESAS

1014 / 1158 page

Section 22 Clock Pulse Generator

Rev.1.00 Jun. 07, 2006 Page 962 of 1102

REJ09B0294-0100

Bit

Bit Name

Initial

Value

R/W

Description



R/W

Reserved

These bits are always read as 0. The write value should

always be 0.

EXSTP

R/W

Main Clock Oscillation Stop

The main clock oscillator and PLL remain active

during subclock operation, but are stopped in

standby mode.

The main clock oscillator and PLL are stopped

during subclock operation.

WAKE32K

R/W

Wakeup Clock Select

Selects the operating clock for use as the system clock

after the transition from the subclock operation in

software standby mode has been initiated by an

interrupt.

On leaving software standby mode, the main clock

is the operating clock.

On leaving software standby mode, the subclock is

the operating clock. This setting is valid when bit 0

(CK32K) is set to 1.

CK32K

R/W

Subclock Select

The system clock (I

φ), peripheral module clock

φ), and external bus clock (Bφ) operate on the

main clock.

The system clock (I

φ), peripheral module clock

φ), and external bus clock (Bφ) operate on the

subclock.

When the OSC32STP bit in TCR32K is 1, 1 cannot be

written to this bit. This bit is cleared to 0 when clearing

software standby mode while the value of WAKE32K

is 0. Dummy read of this bit must be performed twice

immediately after this bit is written to.

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