H8SXSLASH1663 datasheet(1029/1158 Pages) RENESAS

1029 / 1158 page

Section 23 Power-Down Modes

Rev.1.00 Jun. 07, 2006 Page 977 of 1102

REJ09B0294-0100

• MSTPCRB

Bit

Bit Name

Initial Value

R/W

MSTPB15

R/W

MSTPB14

R/W

MSTPB13

R/W

MSTPB12

R/W

MSTPB11

R/W

MSTPB10

R/W

MSTPB9

R/W

MSTPB8

R/W

Bit

Bit Name

Initial Value

R/W

MSTPB7

R/W

MSTPB6

R/W

MSTPB5

R/W

MSTPB4

R/W

MSTPB3

R/W

MSTPB2

R/W

MSTPB1

R/W

MSTPB0

R/W

• MSTPCRA

Bit

Bit Name

Initial

Value

R/W

Module

ACSE

R/W

All-Module-Clock-Stop Mode Enable

Enables/disables all-module-clock-stop mode for

reducing current consumption by stopping the bus

controller and I/O ports operations when the CPU

executes the SLEEP instruction after the module stop

state has been set for all the on-chip peripheral modules

controlled by MSTPCR.

0: All-module-clock-stop mode disabled

1: All-module-clock-stop mode enabled

MSTPA14

R/W

Reserved

MSTPA13

R/W

DMA controller (DMAC)

MSTPA12

R/W

Data transfer controller (DTC)

MSTPA11

MSTPA10

R/W

Reserved

These bits are always read as 1. The write value should

always be 1.

MSTPA9

R/W

8-bit timer (TMR_3 and TMR_2)

MSTPA8

R/W

8-bit timer (TMR_1 and TMR_0)

MSTPA7

MSTPA6

R/W

Reserved

These bits are always read as 1. The write value should

always be 1.

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