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M32C/86T 数据表(PDF) 69 Page - Renesas Technology Corp

部件名 M32C/86T
功能描述  RENESAS 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  505 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

M32C/86T 数据表(HTML) 69 Page - Renesas Technology Corp

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Page 46
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6. Voltage Detection Circuit
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6.1 Low Voltage Detection Interrupt
If the D40 bit in the D4INT register is set to "1" (low voltage detection interrupt enabled), low voltage
detection interrupt request is generated when the voltage applied to the VCC pin rises above or drops below
Vdet4. The low voltage detection interrupt shares the same interrupt vector with the watchdog timer inter-
rupt and oscillation stop detection interrupt. The D42 bit in the D4INT register determines whether the low
voltage detection interrupt has been generated. Read the D42 bit using an interrupt routine when using the
low voltage detection interrupt at the same time as the watchdog timer interrupt and oscillation stop detec-
tion interrupt.
Set the D41 bit in the D4INT register to "1" (enabled) to use the low voltage detection interrupt to exit stop
mode or wait mode.
The D42 bit is set to "1" (more or less than Vdet4 detected) as soon as the voltage applied to the VCC pin
reaches Vdet4 due to the voltage rise and voltage drop. When the D42 bit setting changes "0" to "1", low
voltage detection interrupt request is generated. Set the D42 bit to "0" (not detected) by program. However,
when the D41 bit is set to "1" and the microcomputer is in stop mode or wait mode, low voltage detection
interrupt request is generated, regardless of the D42 bit setting, if the voltage applied to the VCC pin is
detected to be higher than Vdet4. The microcomputer then exits stop mode or wait mode.
Table 6.1 shows how a low voltage detection interrupt request is generated.
The DF1 and DF0 bits in the D4INT register determine sampling period that detects the voltage applied to
the VCC pin rises above or drops below Vdet4. Table 6.2 shows the sampling periods.
Table 6.1 Conditions to Generate Low Voltage Detection Interrupt Request
- : "0" or "1"
NOTES:
1. All states excluding wait mode and stop mode are handled as normal operating mode. (Refer to 9.
Clock Generation Circuit.)
2. Refer to 6.1.1 Limitations for Exiting Stop/Wait Mode.
3. Sampling begins after the VC13 bit setting changes. An interrupt request is generated after sampling is
completed. See Figure 6.6 for details.
4. Set to "0" by program before generating an interrupt.
Table 6.2 Sampling Periods
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