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M16C/26 数据表(PDF) 114 Page - Renesas Technology Corp

部件名 M16C/26
功能描述  16-BIT CMOS SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES
PDF  239 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

M16C/26 数据表(HTML) 114 Page - Renesas Technology Corp

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Renesas Technology Corp.
Serial I/O
108
M16C/26 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Under
development
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
Serial I/O
Serial I/O is configured as three channels: UART0, UART1, and UART2.
UARTi (i = 0 to 2)
UART0, UART1 and UART2 each have an exclusive timer to generate a transfer clock, so they operate
independently of each other.
Figure 1.15.1 shows the block diagram of UART0, UART1 and UART2. Figures 1.15.2 and 1.15.3 show
the block diagram of the transmit/receive unit.
UARTi (i = 0 to 2) has two operation modes: a clock synchronous serial I/O mode and a clock asynchronous
serial I/O mode (UART mode). The contents of the serial I/O mode select bits (bits 0 to 2 at addresses
03A016, 03A816 and 037816) determine whether UARTi is used as a clock synchronous serial I/O or as a
UART. Although a few functions are different, UART0, UART1 and UART2 have almost the same functions.
UART2, in particular, is used for the SIM (Subscriber Identity Module) interface with some extra settings
added in clock-asynchronous serial I/O mode.
Table 1.15.1 shows the comparison of functions of UART0 through UART2, and Figures 1.15.4 to 1.15.10
show the registers related to UARTi.
Note 1: Only when in clock synchronous serial I/O mode.
.
Note 2: Only when in clock synchronous serial I/O mode and 8-bit UART mode.
UART0
UART1
UART2
Function
CLK polarity selection
Continuous receive mode selection
LSB first / MSB first selection
Not Supported
Transfer clock output from multiple
pins selection
Not Supported
Serial data logic switch
TxD, RxD I/O polarity switch
CMOS output/Nch OD
TxD, RxD port output format
N-channel open-drain
output
Parity error signal output
Bus collision detection
Supported
(Note 1)
CMOS output/Nch OD
(Note 1)
Supported
Supported
(Note 1)
Supported
(Note 1)
Supported
(Note 1)
Supported
(Note 1)
Supported
(Note 1)
Supported
(Note 1)
Supported
(Note 1)
Supported
(Note 2)
Supported (Note 3)
Supported
(Note 3)
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Not Supported
Supported
Supported
Note 3: Used for SIM interface.
Table 1.15.1. Comparison of functions of UART0 through UART2



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