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H8/3002 数据表(PDF) 10 Page - Renesas Technology Corp |
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H8/3002 数据表(HTML) 10 Page - Renesas Technology Corp |
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10 / 700 page ![]() 9.5 Port 8 ........................................................................................................................ 251 9.5.1 Overview......................................................................................................... 251 9.5.2 Register Descriptions...................................................................................... 251 9.5.3 Pin Functions .................................................................................................. 253 9.6 Port 9 ........................................................................................................................ 254 9.6.1 Overview......................................................................................................... 254 9.6.2 Register Descriptions...................................................................................... 254 9.6.3 Pin Functions .................................................................................................. 256 9.7 Port A ........................................................................................................................ 258 9.7.1 Overview......................................................................................................... 258 9.7.2 Register Descriptions...................................................................................... 259 9.7.3 Pin Functions .................................................................................................. 261 9.8 Port B ........................................................................................................................ 269 9.8.1 Overview......................................................................................................... 269 9.8.2 Register Descriptions...................................................................................... 269 9.8.3 Pin Functions .................................................................................................. 271 Section 10 16-Bit Integrated Timer Unit (ITU)..................................................... 277 10.1 Overview ........................................................................................................................ 277 10.1.1 Features........................................................................................................... 277 10.1.2 Block Diagrams .............................................................................................. 280 10.1.3 Input/Output Pins............................................................................................ 285 10.1.4 Register Configuration.................................................................................... 286 10.2 Register Descriptions...................................................................................................... 289 10.2.1 Timer Start Register (TSTR) .......................................................................... 289 10.2.2 Timer Synchro Register (TSNC) .................................................................... 290 10.2.3 Timer Mode Register (TMDR)....................................................................... 292 10.2.4 Timer Function Control Register (TFCR) ...................................................... 295 10.2.5 Timer Output Master Enable Register (TOER) .............................................. 297 10.2.6 Timer Output Control Register (TOCR)......................................................... 300 10.2.7 Timer Counters (TCNT) ................................................................................. 301 10.2.8 General Registers (GRA, GRB) ..................................................................... 302 10.2.9 Buffer Registers (BRA, BRB) ........................................................................ 303 10.2.10 Timer Control Registers (TCR) ...................................................................... 304 10.2.11 Timer I/O Control Register (TIOR)................................................................ 306 10.2.12 Timer Status Register (TSR)........................................................................... 308 10.2.13 Timer Interrupt Enable Register (TIER)......................................................... 311 10.3 CPU Interface ................................................................................................................. 313 10.3.1 16-Bit Accessible Registers ............................................................................ 313 10.3.2 8-Bit Accessible Registers .............................................................................. 315 |
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