H8SLASH3002 datasheet(11/700 Pages) RENESAS

11 / 700 page

10.4

Operation ........................................................................................................................ 317

10.4.1

Overview......................................................................................................... 317

10.4.2

Basic Functions............................................................................................... 318

10.4.3

Synchronization .............................................................................................. 328

10.4.4

PWM Mode .................................................................................................... 330

10.4.5

Reset-Synchronized PWM Mode ................................................................... 334

10.4.6

Complementary PWM Mode.......................................................................... 337

10.4.7

Phase Counting Mode..................................................................................... 347

10.4.8

Buffering......................................................................................................... 349

10.4.9

ITU Output Timing ......................................................................................... 356

10.5

Interrupts ........................................................................................................................ 358

10.5.1

Setting of Status Flags .................................................................................... 358

10.5.2

Clearing of Status Flags.................................................................................. 360

10.5.3

Interrupt Sources and DMA Controller Activation ........................................ 361

10.6

Usage Notes .................................................................................................................... 362

Section 11

Programmable Timing Pattern Controller ......................................... 377

11.1

Overview ........................................................................................................................ 377

11.1.1

Features........................................................................................................... 377

11.1.2

Block Diagram................................................................................................ 378

11.1.3

TPC Pins ......................................................................................................... 379

11.1.4

Registers ......................................................................................................... 380

11.2

Register Descriptions...................................................................................................... 381

11.2.1

Port A Data Direction Register (PADDR) ...................................................... 381

11.2.2

Port A Data Register (PADR) ......................................................................... 381

11.2.3

Port B Data Direction Register (PBDDR) ...................................................... 382

11.2.4

Port B Data Register (PBDR) ......................................................................... 382

11.2.5

Next Data Register A (NDRA)....................................................................... 383

11.2.6

Next Data Register B (NDRB) ....................................................................... 385

11.2.7

Next Data Enable Register A (NDERA) ........................................................ 387

11.2.8

Next Data Enable Register B (NDERB)......................................................... 388

11.2.9

TPC Output Control Register (TPCR)............................................................ 389

11.2.10

TPC Output Mode Register (TPMR).............................................................. 392

11.3

Operation ........................................................................................................................ 394

11.3.1

Overview......................................................................................................... 394

11.3.2

Output Timing................................................................................................. 395

11.3.3

Normal TPC Output........................................................................................ 396

11.3.4

Non-Overlapping TPC Output........................................................................ 398

11.3.5

TPC Output Triggering by Input Capture....................................................... 400

11.4

Usage Notes .................................................................................................................... 401

11.4.1

Operation of TPC Output Pins........................................................................ 401

11.4.2

Note on Non-Overlapping Output .................................................................. 401

H8/3002 数据表(PDF) 11 Page - Renesas Technology Corp

H8/3002 数据表(HTML) 11 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载