H8SLASH3002 datasheet(12/700 Pages) RENESAS

12 / 700 page

Section 12

Watchdog Timer ........................................................................................ 403

12.1

Overview ........................................................................................................................ 403

12.1.1

Features........................................................................................................... 403

12.1.2

Block Diagram................................................................................................ 404

12.1.3

Pin Configuration............................................................................................ 404

12.1.4

12.2

Register Descriptions...................................................................................................... 406

12.2.1

Timer Counter (TCNT)................................................................................... 406

12.2.2

Timer Control/Status Register (TCSR)........................................................... 407

12.2.3

Reset Control/Status Register (RSTCSR) ...................................................... 409

12.2.4

Notes on Register Access ............................................................................... 411

12.3

Operation ........................................................................................................................ 413

12.3.1

Watchdog Timer Operation............................................................................. 413

12.3.2

Interval Timer Operation ................................................................................ 414

12.3.3

Timing of Setting of Overflow Flag (OVF).................................................... 415

12.3.4

Timing of Setting of Watchdog Timer Reset Bit (WRST) ............................. 416

12.4

Interrupts ........................................................................................................................ 417

12.5

Usage Notes .................................................................................................................... 417

Section 13

Serial Communication Interface........................................................... 419

13.1

Overview ........................................................................................................................ 419

13.1.1

Features........................................................................................................... 419

13.1.2

Block Diagram................................................................................................ 421

13.1.3

Input/Output Pins............................................................................................ 422

13.1.4

13.2

Register Descriptions...................................................................................................... 423

13.2.1

Receive Shift Register (RSR) ......................................................................... 423

13.2.2

Receive Data Register (RDR)......................................................................... 423

13.2.3

Transmit Shift Register (TSR) ........................................................................ 424

13.2.4

Transmit Data Register (TDR) ....................................................................... 424

13.2.5

Serial Mode Register (SMR) .......................................................................... 425

13.2.6

Serial Control Register (SCR) ........................................................................ 429

13.2.7

Serial Status Register (SSR) ........................................................................... 433

13.2.8

Bit Rate Register (BRR) ................................................................................. 437

13.3

Operation ........................................................................................................................ 446

13.3.1

Overview......................................................................................................... 446

13.3.2

Operation in Asynchronous Mode.................................................................. 448

13.3.3

Multiprocessor Communication ..................................................................... 457

13.3.4

Synchronous Operation .................................................................................. 464

13.4

SCI Interrupts.................................................................................................................. 473

13.5

Usage Notes .................................................................................................................... 474

H8/3002 数据表(PDF) 12 Page - Renesas Technology Corp

H8/3002 数据表(HTML) 12 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载