H8SLASH3002 datasheet(29/700 Pages) RENESAS

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Table 1-3 Pin Functions (cont)

Pin No.

FP-100B,

Type

Symbol

TFP-100B

FP-100A

I/O

Name and Function

Refresh

RFSH

Output

Refresh: Indicates a refresh cycle

controller

CS3

Output

Row address strobe

RAS: Row address

strobe signal for DRAM connected to area 3

Output

Column address strobe

CAS: Column

address strobe signal for DRAM connected

to area 3; used with 2

WE DRAM.

Write enable: Write enable signal for DRAM

connected to area 3; used with 2

CAS DRAM.

HWR

Output

Upper write: Write enable signal for DRAM

connected to area 3; used with 2

WE DRAM.

Upper column address strobe: Column

address strobe signal for DRAM connected

to area 3; used with 2

CAS DRAM.

LWR

Output

Lower write: Write enable signal for DRAM

connected to area 3; used with 2

WE DRAM.

Lower column address strobe: Column

address strobe signal for DRAM connected

to area 3; used with 2

CAS DRAM.

DREQ1,

9, 8

11, 10

Input

DMA request 1 and 0: DMAC activation

DREQ0

requests

TEND1,

94, 93

96, 95

Output

Transfer end 1 and 0: These signals indicate

TEND0

that the DMAC has ended a data transfer

TCLKD to

96 to 93

98 to 95

Input

Clock input D to A: External clock inputs

TCLKA

TIOCA4 to

4, 2, 99,

6, 4, 1,

Input/

Input capture/output compare A4 to A0:

TIOCA0

97, 95

99, 97

output

GRA4 to GRA0 output compare or input

capture, or PWM output

TIOCB4 to

5, 3, 100,

7, 5, 2,

Input/

Input capture/output compare B4 to B0:

TIOCB0

98, 96

100, 98

output

GRB4 to GRB0 output compare or input

capture, or PWM output

TOCXA4

Output

Output compare XA4: PWM output

TOCXB4

Output

Output compare XB4: PWM output

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