ADATE304BBCZ datasheet(16/52 Pages) AD

部件名	ADATE304BBCZ

功能描述	200 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH

PDF	52 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

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16 / 52 page

ADATE304

Rev. 0 | Page 16 of 52

EXTERNAL SENSE (PMUS_CHx)

Table 8.

Parameter

Min

Typ

Max

Unit

Test

Level

Test Conditions/Comments

EXTERNAL SENSE (PMUS_CHX)

Voltage Range

−1.25

+6.75

Input Leakage Current

−20

+20

Tested at −1.25 V and +6.75 V

DUTGND INPUT

Table 9.

Parameter

Min

Typ

Max

Unit

Test

Level

Test Conditions/Comments

DUTGND INPUT

Input Voltage Range, Referenced to GND

−0.1

+0.1

Input Bias Current

100

μA

Tested at −100 mV and +100 mV

SERIAL PERIPHERAL INTERFACE

Table 10.

Parameter

Min

Typ

Max

Unit

Test

Level

Test Conditions/Comments

SERIAL PERIPHERAL INTERFACE

Serial Input Logic High

1.8

VCC

Serial Input Logic Low

0.7

Input Bias Current

−10

+10

μA

Tested at 0.0 V and 3.3 V

SCLK Clock Rate

MHz

SCLK Pulse Width

SCLK Crosstalk on DUTx Pin

PE disabled, PMU FV enabled and forcing 0 V

Serial Output Logic High

VCC − 0.4

VCC

Sourcing 2 mA

Serial Output Logic Low

0.8

Sinking 2 mA

Update Time

μs

Maximum delay time required for the part to

enter a stable state after a serial bus

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