TS5071 datasheet(12/32 Pages) STMICROELECTRONICS

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HYBRID BALANCE FILTER

The Hybrid Balance Filter on COMBO IIG is a

programmable filter consisting of a second-order

Bi-Quad section, Hybal1, followed by a first-order

section, Hybal2, and a programmable attenuator.

Either of the filter sections can be bypassed if

only one is required to achieve good cancellation.

A selectable 180 degree inverting stage is in-

cluded to compensate for interface circuits which

also invert the transmit input relative to the re-

ceive output signal. The Bi-Quad is intended

mainly to balance low frequency signals across a

transformer SLIC, and the first order section to

balance midrange to higher audio frequency sig-

nals. The attenuator can be programmed to com-

pensate for VFROto VFXI echos in the range

of -2.5 to – 8.5 dB.

As a Bi-Quad, Hybal1 has a pair of low frequency

zeroes and a pair of complex conjugate poles.

When configuring the Bi-Quad, matching the

phase of the hybrid at low to midband frequencies

is most critical. Once the echo path is correctly

balanced in phase, the magnitude of the cancella-

tion signal can be corrected by the programmable

attenuator.

The Bi-Quad mode of Hybal1 is most suitable for

balancing interfaces with transformers having high

inductance of 1.5 Henries or more. An alternative

configuration for smaller transformers is available

by converting Hybal1 to a simple first-order section

with a single real low frequency pole and 0 Hz zero.

In this mode, the pole/zero frequency may be pro-

grammed.

Many line interfaces can be adequately balanced

by use of the Hybal1 section only, in which case

the Hybal2 filter should be de-selected to bypass

it.

Hybal2, the higher frequency first-order section, is

provided for balancing an electronic SLIC, and is

also helpful with a transformer SLIC in providing

additional phase correction for mid and high-band

frequencies, typically 1 kHz to 3.4 kHz. Such a

correction is particularly useful if the test balance

impedance includes a capacitor of 100 nF or less,

such as the loaded and non-loaded loop test net-

works in the United States. Independent place-

ment of the pole and zero location is provided.

Bit

State

Function

Disable Hybrid Balance Circuit Completely.

No internal cancellation is provided.

Enable Hybrid Balance Cancellation Path

Phase of the internal cancellation signal assumes inverted phase of the echo

path from VFROto VFXI.

Phase of the internal cancellation signal assumes no phase inversion in the line

interface.

Bypass Hybal 2 Filter Section

Enable Hybal 2 Filter Section

G4–G0

Attenuation Adjustment for the Magnitude of the Cancellation Signal. Range is

– 2.5 dB (00000) to – 8.5 dB (11000)

Table 9: Hybrid Balance Register 1 Byte 2 Instruction.

Notes:

1. Maximum level into 300

Ω ; 2. Maximum level into 600Ω;3. RL ≥15KΩ

(*) State at power on initialization

Setting = Please refer to software TS5077 2

Bit Number

0dBm0 Test Leve at VFR0

In dBm (Into 600

Ω)

In Vrms (approx.)

No Output

– 17.3

– 17.2

0.106

0.107

0.775

+ 6.9 (note 1)

1.71

+ 7.6 (note 2)

1.86

+ 8.1 (note 3)

1.07

Table 8: Byte 2 of Receive Gain Instructions.

TS5070 - TS5071

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