TS5071 datasheet(4/32 Pages) STMICROELECTRONICS

部件名	TS5071

功能描述	PROGRAMMABLE CODEC/FILTER COMBO 2ND GENERATION

PDF	32 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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4 / 32 page

PIN CONNECTIONS

POWER SUPPLY, CLOCK

Name

Type

TS5070

TS5071

Function

Description

VCC

VSS

GND

Positive Power

Supply

Negative

Power Supply

Ground

+5 V

± 5%

–5V

± 5%

All analog and digital signals are referenced to this pin.

BCLK

Bit Clock

Bit clock input used to shift PCM data into and out of the

DR and DX pins. BCLK may vary from 64 kHz to 4.096

MHz in 8 kHz increments, and must be synchronous with

MCLK (TS5071 only).

MCLK

Master Clock

Master clock input used by the switched capacitor filters

and the encoder and decoder sequencing logic. Must be

512 kHz, 1. 536/1. 544 MHz,

2.048 MHz or 4.096 MHz and synchronous with BCLK.

BCLK and MCLK are wired together in the TS5071.

PLCC28

TS5070FN

DIP20

TS5071N

TS5070 - TS5071

4/32

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