TS5070FN datasheet(9/32 Pages) STMICROELECTRONICS

9 / 32 page

CONTROL REGISTER INSTRUCTION

The first byte of a READ or WRITE instruction to

the Control Register is as shown in table 1. The

second byte functions are detailed in table 2.

MASTER CLOCK FREQUENCY SELECTION

A Master clock must be provided to COMBO IIG

for operation of the filter and coding/decoding

functions. The MCLK frequency must be either

512 kHz, 1.536 MHz, 1.544 MHz, 2.048 MHz, or

4.096 MHz and must be synchronous with BCLK.

Bits F1 and F0 (see table 2) must be set during

initialization to select the correct internal divider.

CODING LAW SELECTION

Bits ”MA” and ”IA” in table 2 permit the selection

µ255 coding or A-law coding with or without

even-bit inversion.

ANALOG LOOPBACK

Analog Loopback mode is entered by setting the

”AL” and ”DL” bits in the Control Register as shown

in table 2. In the analog loopback mode, the Trans-

mit input VFXI is isolated from the input pin and in-

ternally connected to the VFRO output, forming a

loop from the Receive PCM Register back to the

Transmit PCM Register. The VFRO pin remains ac-

tive, and the programmed settings of the Transmit

and Receive gains remain unchanged, thus care

must be taken to ensure that overload levels are

not exceeded anywhere in the loop.

Hybrid balancing must be disabled for meaning

ful analog loopback Function.

DIGITAL LOOPBACK

Digital Loopback mode is entered by setting the

”DL” bit in the Control Register as shown in table 2.

Bit Number

Fun ction

543210

MCLK = 512 kHz

MCLK = 1. 536 or 1. 544 MHz

MCLK = 2. 048 MHz

MCLK = 4. 096 MHz

Select

µ. 255 Law *

A–law, Including Even Bit Inversion

A–Law, No Even Bit Inversion

Delayed Data Timing

Non–delayed Data Timing

Normal Operation

Digital Loopback

Analog Loopback

Power Amp Enabled in PDN

Power Amp Disabled in PDN

Table 2: Control Register Byte 2 Functions

Table 3: Coding Law Conventions.

m255 Law

MSB LSB

True A-law with

even bit inversion

MSB LSB

A-law without

even bit inversion

MSB LSB

VIN = +Full Scale

1000

010

101

111

VIN =0V

VIN = -Full Scale

0000

000

101

111

Note: The MSB is always the first PCM bit shifted in or out of COMBO IIG.

(*) State at power-on initialization (bit 4 = 0)

TS5070 - TS5071

9/32

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