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PCA2000U/AB 数据表(PDF) 5 Page - NXP Semiconductors |
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PCA2000U/AB 数据表(HTML) 5 Page - NXP Semiconductors |
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5 / 28 page ![]() PCA2000_2001_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 11 November 2008 5 of 28 NXP Semiconductors PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse Therefore it is possible to program a larger energy gap between the pulses with step detection and the strongest, not monitored, pulse. This might be necessary to ensure a reliable and stable operation under adverse conditions (magnetic fields and vibrations). If the watch works in the highest driving stage, the driving level jumps after the 4-minute period directly to the lowest stage, and not just one stage lower. To optimize the performance for different motors, the following parameters can be programmed: • Pulse width: 0.98 ms to 7.8 ms in steps of 0.98 ms • Duty cycle of lowest driving level: 37.5 % to 56.25 % in steps of 6.25 % • Number of driving levels (including the highest driving level): 3 to 6 • Duty cycle of the highest driving level: 75 % or 100 % • Enlargement pulse for the highest driving level: on or off The enlargement pulse has a duty cycle of 25 % and a pulse width which is twice the programmed motor pulse width. The repetition period for the chopping pattern is 0.98 ms. Figure 4 shows an example of a 3.9 ms pulse. 7.2 Step detection Figure 5 shows a simplified diagram of the motor driving and step detection circuit, and Figure 6 shows the step detection sequence and corresponding sampling current. Between the motor driving pulses, the switches P1 and P2 are closed, which means the motor is short-circuited. For a pulse in one direction, P1 and N2 are open, and P2 and N1 are closed with the appropriate duty cycle; for a pulse in the opposite direction, P2 and N1 are open, and P1 and N2 closed. Fig 4. Possible modulations for a 3.9 ms motor pulse 43.75 % 37.5 % DUTY CYCLE 50 % 56.25 % 62.5 % 68.75 % 75 % 81.25 % 100 % mgw351 0.244 ms 0.122 ms 0.98 ms 0.98 ms 0.98 ms 0.98 ms |
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