PCA2000_2001_5

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 05 — 11 November 2008

6 of 28

NXP Semiconductors

PCA2000; PCA2001

32 kHz watch circuit with programmable adaptive motor pulse

The step detection phase is initiated after the motor driving pulse. In phase 1 P1 and P2

are first closed for 0.98 ms and then in phase 2 all four drive switches (P1, N1, P2 and N2)

are opened for 0.98 ms. As a result, the energy stored in the motor inductance is reduced

as fast as possible.

The induced current caused by the residual motor movement is then sampled in phase 3

(closing P3 and P2) and in phase 4 (closing P1 and P4). For step detection in the opposite

direction P1 and P4 are closed during phase 3 and P2 and P3 during phase 4 (see

Figure 6).

Fig 5.

Simplified diagram of motor driving and step detection circuit

Fig 6.

Step detection sequence and corresponding sampling voltage

mgw352

MOTOR

MOT1

N1

P1

D1

RD

N2

P2

P4

P3

MOT2

mgw569

0.98 ms

(motor shorted)

sampling

voltage

sampling

voltage

positive detection level

negative detection level

programmable time limit

OTP C4 to C6

sampling

positive detection

negative detection

sampling results

motor shorted

sampling

61

µs

0.49 ms

t

t

t