CS2000-CP

DS761PP1

29

8.3.3

Auxiliary Output Source Selection (AuxOutSrc[1:0])

Selects the source of the AUX_OUT signal.

Note:

When set to 11, AuxLckCfg sets the polarity and driver type (“AUX PLL Lock Output Configura-

tion (AuxLockCfg)” on page 31).

8.3.4

Enable Device Configuration Registers 1 (EnDevCfg1)

This bit, in conjunction with EnDevCfg2, enables control port mode. Both bits must be set to 1 during ini-

tialization.

Note:

EnDevCfg2 must also be set to enable control port mode (“SPI / I²C Control Port” on page 24).

8.4

Device Configuration 2 (Address 04h)

8.4.1

Auto R-Modifier Enable (AutoRMod)

Controls the automatic ratio modifier function.

8.4.2

Lock Clock Ratio (LockClk[1:0])

Selects one of the four stored User Defined Ratios for use in the dynamic ratio based Hybrid PLL Mode.

AuxOutSrc[1:0]

Auxiliary Output Source

00

RefClk.

01

CLK_IN.

10

CLK_OUT.

11

PLL Lock Status Indicator.

Application:

“Auxiliary Output” on page 22

EnDevCfg1

Register State

0

Disabled.

1

Enabled.

Application:

“SPI / I²C Control Port” on page 24

76543210

Reserved

Reserved

Reserved

Reserved

AutoRMod

LockClk1

LockClk0

FracNSrc

AutoRMod

Automatic R-Mod State

0

Disabled.

1

Enabled.

Application:

“Automatic Ratio Modifier (Auto R-Mod) - Hybrid PLL Mode Only” on page 18

LockClk[1:0]

CLK_IN Ratio Selection

00

Ratio 0.

01

Ratio 1.

10

Ratio 2.

11

Ratio 3.

Application:

Section 5.3.2 on page 17