CS2000-CP

30

DS761PP1

8.4.3

Fractional-N Source for Frequency Synthesizer (FracNSrc)

Selects static or dynamic ratio mode when auto clock switching is disabled.

8.5

Global Configuration (Address 05h)

8.5.1

Device Configuration Freeze (Freeze)

Setting this bit allows writes to the Device Control and Device Configuration registers (address 02h - 04h)

but keeps them from taking effect until this bit is cleared.

8.5.2

Enable Device Configuration Registers 2 (EnDevCfg2)

This bit, in conjunction with EnDevCfg1, enables control port mode. Both bits must be set to 1 during ini-

tialization.

Note:

EnDevCfg1 must also be set to enable control port mode (“SPI / I²C Control Port” on page 24).

8.6

Ratio 0 - 3 (Address 06h - 15h)

These registers contain the User Defined Ratios as shown in the “Register Quick Reference” section on

page 26. Each group of 4 registers forms a single 32-bit ratio value as shown above. See “Output to Input

Frequency Ratio Configuration” on page 17 and “Calculating the User Defined Ratio” on page 33 for more

details.

FracNSrc

Fractional-N Source Selection

0

1

Dynamic Ratio from Digital PLL for Hybrid PLL Mode

Application:

“Fractional-N Source Selection” on page 20

76543210

Reserved

Reserved

Reserved

Reserved

Freeze

Reserved

Reserved

EnDevCfg2

FREEZE

Device Control and Configuration Registers

0

Register changes take effect immediately.

1

Modifications may be made to Device Control and Device Configuration registers (registers 02h-04h) without

the changes taking effect until after the FREEZE bit is cleared.

EnDevCfg2

Register State

0

Disabled.

1

Enabled.

Application:

“SPI / I²C Control Port” on page 24

76543210

MSB

...................................................................................................................................................

MSB-7

MSB-8

...................................................................................................................................................

MSB-15

LSB+15

...................................................................................................................................................

LSB+8

LSB+7

...................................................................................................................................................

LSB