DS626F3

11

CS5366

DC POWER

MCLK = 12.288 MHz; Master Mode. GND = 0 V.

1.

Power-Down is defined as RST = LOW with all clocks and data lines held static at a valid logic level.

LOGIC LEVELS

PSRR, VQ AND FILT+ CHARACTERISTICS

MCLK = 12.288 MHz; Master Mode. Valid with the recommended capacitor values on FILT+ and VQ as shown in

the “Typical Connection Diagram”.

Parameter

Symbol

Min

Typ

Max

Unit

Power Supply Current

VA = 5 V

(Normal Operation)

VX = 5 V

VD = 5 V

VD = 3.3 V

VLS, VLC = 5 V

VLS, VLC = 3.3 V

-

-

-

-

-

-

76

4

60

37

6

3

84

8

66

40

8

5

mA

mA

mA

mA

mA

mA

Power Supply Current

VA = 5 V

(Power-Down) (Note 1)

VLS, VLC,VD = 5 V

-

-

50

500

-

-

μA

μA

Power Consumption

(Normal Operation)

All Supplies = 5 V

VA = 5 V, VD = VLS = VLC = 3.3 V

(Power-Down) (Note 1)

-

-

-

-

-

-

730

532

2.75

830

609

-

mW

mW

mW

mW

Parameter

Symbol

Min

Typ

Max

Units

High-Level Input Voltage

%VLS/VLC

70

-

-

%

Low-Level Input Voltage

%VLS/VLC

30

High-Level Output Voltage at 100

μA load

%VLS/VLC

85

-

Low-Level Output Voltage at -100

μA load

%VLS/VLC

-15

OVFL Current Sink

-4

mA

Input Leakage Current

logic pins only

-10

-

10

μA

Parameter

Symbol

Min

Typ

Max

Unit

Power Supply Rejection Ratio at (1 kHz)

PSRR

-

65

-

dB

Output Impedance

Maximum allowable DC current source/sink

-

VA/2

25

10

-

V

k

Ω

μA

Filt+ Nominal Voltage

Output Impedance

Maximum allowable DC current source/sink

-

VA

4.4

10

-

V

k

Ω

μA