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AT89C5131A-RDTIL 数据表(PDF) 30 Page - ATMEL Corporation |
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AT89C5131A-RDTIL 数据表(HTML) 30 Page - ATMEL Corporation |
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30 / 186 page  30 AT89C5131A-L 4338F–USB–08/07 The other memory spaces (user, extra row, hardware security) are made accessible in the code segment by programming bits FMOD0 and FMOD1 in FCON register in accor- dance with Table 34. A MOVC instruction is then used for reading these spaces. Table 34. FM0 Blocks Select Bits Launching Programming FPL3:0 bits in FCON register are used to secure the launch of programming. A specific sequence must be written in these bits to unlock the write protection and to launch the programming. This sequence is 5 followed by A. Table 35 summarizes the memory spaces to program according to FMOD1:0 bits. Table 35. Programming Spaces The Flash memory enters a busy state as soon as programming is launched. In this state, the memory is not available for fetching code. Thus to avoid any erratic execution during programming, the CPU enters Idle mode. Exit is automatically performed at the end of programming. Note: Interrupts that may occur during programming time must be disabled to avoid any spuri- ous exit of the idle mode. Status of the Flash Memory The bit FBUSY in FCON register is used to indicate the status of programming. FBUSY is set when programming is in progress. Selecting FM0/FM1 The bit ENBOOT in AUXR1 register is used to choose between FM0 and FM1 mapped up to F800h. FMOD1 FMOD0 FM0 Adressable Space 0 0 User (0000h-FFFFh) 0 1 Extra Row(FF80h-FFFFh) 1 0 Hardware Security (0000h) 1 1 reserved Write to FCON Operation FPL3:0 FPS FMOD1 FMOD0 User 5 X 0 0 No action A X 0 0 Write the column latches in user space Extra Row 5 X 0 1 No action A X 0 1 Write the column latches in extra row space Security Space 5 X 1 0 No action A X 1 0 Write the fuse bits space Reserved 5 X 1 1 No action A X 1 1 No action |
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