CMS4A16LAH datasheet(3/46 Pages) FIDELIX

3 / 46 page

Rev. 0.4, Nov. ‘06

CMS4A16LAx–75xx

128M(8Mx16) Low Power SDRAM

Features

- Functionality

- Standard SDRAM Functionality

- Programmable burst lengths : 1, 2, 4, 8, or full page

- JEDEC Compatibility

-Low Power Features

- Low voltage power supply : 2.5V

- Auto TCSR(Temperature Compensated Self Refresh)

- Partial Array Self Refresh power-saving mode

- Deep Power Down Mode

- Driver Strength Control

- Operating Temperature Ranges:

- Special (-10℃ to +60℃)

- Commercial (0℃ to +70℃)

- Extended (-25℃ to +85℃)

- Industrial (-40℃ to +85℃)

- LVCMOS Compatible IO Interface

- 54ball FBGA with 0.8mm ball pitch

- CMS4A16LAF : Normal

- CMS4A16LAG : Pb-Free

- CMS4A16LAH : Pb-Free & Halogen Free

Functional Description

The CMS4A16LAF Family is high-performance CMOS Dynamic

RAMs (DRAM) organized as 8M x 16. These devices feature

advanced circuit design to provide low active current and

extremely low standby current.

The device is co mpatible w i th th e JEDEC standar d

LP-SDRAM specifications.

Selection Guide

Column

Decoder

Column

Decoder

Column

Decoder

Bank 0

Row

Addr

Latch/

Decoder

Bank 3

Bank 2

Bank 1

Bank 0

Row

Address

Latch/

Decoder

Bank 0

Memory

Array

8Kx4K

Sense Amp

Row

Address

Mux

Write Drivers

DQM Mask

Data

Output

Column

Address

Latch

Bank

Control

Logic

Refresh

Counter

Address

Data

Input

LDQM -

UDQM

DQ0 -

DQ15

Column

Decoder

Extended

Mode

Control

Logic

CKE

CLK

/CS

/WE

/CAS

/RAS

A0-A11

BA0-BA1

Logic Block Diagram

20ns

7ns

100MHz

18ns

6ns

133MHz

1.70-VDD

2.3-3.3V

CMS4A16LAx-75xx

RCD

CL=2

Access Time(t

AC)

CL=3

DDQ

Frequency

Voltage

Device

CMS4A16LAH 数据表(PDF) 3 Page - FIDELIX

CMS4A16LAH 数据表(HTML) 3 Page - FIDELIX

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CMS4A16LAH 数据表(PDF) 3 Page - FIDELIX

CMS4A16LAH 数据表(HTML) 3 Page - FIDELIX

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