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3513 数据表(PDF) 12 Page - Linear Technology |
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3513 数据表(HTML) 12 Page - Linear Technology |
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12 / 20 page ![]() LT3513 12 3513fa All four switchers employ a constant-frequency current mode control scheme. Switcher 1, the step-down regula- tor, differs slightly from the others with inductor current sense. Instead of monitoring the current at the switch, current nodes are used to measure the current through the inductor. Inductor current sense does not suffer from minimum on-time problems, therefore always keep- ing the switch current limited with any input-to-output voltage ratio. Switcher 1 is always synchronized to the master oscillator. The other three switchers each have their own slave oscillator. The slave oscillator reduces the frequency when the feedback voltage dips below 0.75V and decreases linearly below the threshold as shown in the Performance Characteristics’ Frequency Foldback plot. Other than these two differences, the control loop is similar in all four switchers. A pulse from the master oscillator for switcher 1 or a pulse from the slave oscillator for the other three switchers sets the RS latch and turns on the internal NPN bipolar power switch. Current in the switch and the external inductor begins to increase. When this current exceeds a level determined by the voltage at VC, the current comparator resets the latch, turning off the switch. The current in the inductor flows through the Schottky diode and begins to decrease. The cycle begins again at the next pulse from the oscillator. In this way, the voltage on the VC pin controls the current through the inductor to the output. The internal error amplifier regulates the output by continually adjusting the VC pin voltage. The threshold for switching on the VC pin is 0.8V, and an active clamp of 1.8V limits the VC voltage. Switchers 2, 3 and 4 also contain an independent current limit not dependent on VC or duty cycle. Switcher 1’s current limit is controlled by the VC voltage and varies with duty cycle. All four switch- ers also use slope compensation to ensure stability with the current mode scheme at duty cycles above 50%. The RUN-SS1, RUN-SS2 and RUN-SS3/4 pins control the rate of rise of the feedback pins. The switch driver for SW1 operates either from VIN or from the BOOST pin. An external capacitor and an integrated Schottky diode are used to generate a voltage at the BOOST pin that is higher than the input supply. This allows the driver to saturate the internal bipolar NPN power switch for efficient operation. INPUT VOLTAGE RANGE STEP-DOWN CONSIDERATION The minimum operating voltage of switcher 1 is determined either by the LT3513’s undervoltage lockout of ~4V or by its maximum duty cycle. A user defined undervoltage lockout may be set with the UVLO pin at a voltage higher than the internal undervoltage lockout. The duty cycle is the fraction of time that the internal switch is on and is determined by the input and output voltages: DC VV VV V OUT F IN SW F = + + – where VF is the forward voltage drop of the catch diode (~0.4V) and VSW is the voltage drop of the internal switch (~0.3V at maximum load). This leads to a minimum input voltage of: V VV DC V V IN MIN OUT F MAX F SW () – = + + with DCMAX = 0.75. The user defined undervoltage is set by a resistor divider connected to the UVLO pin. The comparator pulls 3μA from the pin when the UVLO pin is higher than 1.25V. The hysteresis and minimum input voltage equations are as follows: VR k µA VV RR R HYS IN MIN =+ () = + 22 3 9 125 12 1 •. . () R2 R1 UVLO 3513 A1 VIN 38 OPERATION |
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