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3513 数据表(PDF) 18 Page - Linear Technology |
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3513 数据表(HTML) 18 Page - Linear Technology |
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18 / 20 page ![]() LT3513 18 3513fa Printed Circuit Board Layout For proper operation and minimum EMI, care must be taken during printed circuit board (PCB) layout. Figure 3 shows the high current paths in the step-down regula- tor circuit. Note that in the step-down regulators, large, switched currents flow in the power switch, the catch diode and the input capacitor. In the step-up regulators, large, switched currents flow through the power switch, the switching diode and the output capacitor. In SEPIC and inverting regulators, the switched currents flow through the power switch, the switching diode and the tank capaci- tor. The loop formed by the components in the switched current path should be as small as possible. Place these components, along with the inductor and output capacitor, on the same side of the circuit board, and connect them on that layer. Place a local, unbroken ground plane below these components, and tie this ground plane to system ground at one location, ideally at the ground terminal of the output capacitor C2. Additionally, keep the SW and BOOST nodes as small as possible. Thermal Considerations The PCB must provide heat sinking to keep the LT3513 cool. The Exposed Pad on the bottom of the package must be soldered to a ground plane. This ground should be tied to other copper layers below with thermal vias; these lay- ers will spread the heat dissipated by the LT3513. Place additional vias near the catch diodes. Adding more copper to the top and bottom layers and tying this copper to the internal planes with vias can reduce thermal resistance further. With these steps, the thermal resistance from die (or junction) to ambient can be reduced to θJA = 25°C or less. With 100LFPM airflow, this resistance can fall by another 25%. Further increases in airflow will lead to lower thermal resistance. VIN SW GND (3a) VIN VSW C1 D1 C2 3519 F03 L1 SW GND (3c) VIN SW GND (3b) IC1 Figure 3. Subtracting the Current When the Switch is On (3a) from the Current When the Switch is Off (3b) Reveals the Path of the High Frequency Switching Current (3c) Keep this Loop Small. The Voltage on the SW and BOOST Nodes will Also be Switched; Keep These Nodes as Small as Possible. Finally, Make Sure The Circuit is Shielded with a Local Ground Plane Figure 4. Topside PCB Layout OPERATION |
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