LT3513

17

3513fa

them the preferred choice. The low ESR results in very

low voltage ripple. Ceramic capacitors can handle larger

magnitudes of ripple current than other capacitor types of

the same value. Use X5R and X7R types. An alternative to

a high value ceramic capacitor is a lower value along with

a larger electrolytic capacitor, for example a 1μF ceramic

capacitor in parallel with a low ESR tantalum capacitor. For

the electrolytic capacitor, a value larger than 10μF will be

required to meet the ESR and ripple current requirements.

Because the input capacitor is likely to see high surge

currents when the input source is applied, only consider

a tantalum capacitor if it has the appropriate surge current

rating. The manufacturer may also recommend operation

below the rated voltage of the capacitor. Be sure to place

pins on the IC for optimal noise immunity.

A final caution is in order regarding the use of ceramic

capacitors at the input. A ceramic input capacitor can

combine with stray inductance to form a resonant tank

circuit. If power is applied quickly (for example by plugging

the circuit into a live power source), this tank can ring,

doubling the input voltage and damaging the LT3513. The

solution is to either clamp the input voltage or dampen the

tank circuit by adding a lossy capacitor (an electrolytic)

in parallel with the ceramic capacitor. For details, see Ap-

plication Note 88.

Soft-Start and Shutdown

The RUN-SS1(Run/Soft-Start) pin is used to place the

switching regulators and the internal bias circuits in

shutdown mode. It also provides a soft-start function,

along with RUN-SS2 and RUN-SS3/4. If the RUN-SS1

pin is pulled to ground, the LT3513 enters its shutdown

mode with all regulators off and quiescent current reduced

to ~30μA. An internal 2μA current source pulls up on the

RUN-SS1, RUN-SS2, and RUN-SS3/4 pins. If the RUN-SS1

pin reaches ~0.6V, the internal bias circuits start and the

quiescent currents increase to their nominal levels.

If a capacitor is tied from the RUN-SS1, RUN-SS2 or

RUN-SS3/4 pins to ground, then the internal pull-up

current will generate a voltage ramp on these pins. This

and therefore input current during start-up. The RUN-SS1

is the value of the largest output capacitor.

limited and will protect the LT3513 and input source from

a shorted output.

scanning frequency to improve LCD image quality.

Low Voltage Dropout Linear Regulator

The LT3513 features an output to drive an external NPN

transistor LDO to provide a lower voltage logic supply volt-

age. The output is capable of providing 10mA of current to

the base of the NPN. The output of the LDO is controlled

by the FB5 pin. Choose the resistor values according to:

RR

V

V

LDO

8

7

0 625

1

=

⎛

⎝⎜

⎞

⎠⎟

.

–

R8 should be 10k or less to avoid bias current errors.

The internal compensation of the LDO relies on a low ESR

ceramic capacitor between the values of 2.2μF and 20μF.

X7R dielectrics are preferred, followed by X5R, as these

materials retain their capacitance over wide voltage and

temperature ranges.

OPERATION