MICRF219 datasheet(15/24 Pages) MICREL

15 / 24 page

Micrel

MICRF219

January 2009

M9999-011509

(408) 944-0800

ata

n fo

ctly, it is

idth of th

ilar

elow PW2

sed for the

fou

foun

efe

e pe

th w

eref

y (0

20% duty cycle, then the ban

dth

required would be 32.5kHz (0.65 / 20µsec). This

ld excee

th of the

demodulator

e tr

exceed the

maximum bandwidth, the pulse would appear

tch

JP1

JP2

Demo

Sho

Pulse

Maximum

baud rate

50%

Cycle

Demodulator Bandwidth Selection and D

Stream Optimization

JP1 and JP2 are the bandwidth selectio

demodulator bandwidth. To set it corre

necessary to know the shortest pulse w

encoded data sent in the transmitter. Sim

example of the data profile in the Figure 7 b

is shorter than PW1, so PW2 should be u

demodulator bandwidth calculation which is

0.65/shortest pulse width. After this value is

setting should be done according to Error! R

source not found.. For example, if the puls

100µsec, 50% duty cycle, the pulse wid

50µsec (PW = (100µsec × 50%) / 100). Th

bandwidth of 13kHz would be necessar

50µsec). However, if this data stream had

period with a

r the

the

nd by

d, the

rence

riod is

ill be

ore, a

.65 /

pul

dwi

wou

d the

circui

maxim

If on

bandwid

ies to

stre

ed or ider.

(hertz)

(µsec)

rtest

for

Duty

(Hz)

Short

1625

400

1250

Open

Short

3250

200

2500

Short

Open

6500

100

5000

Open

13000

10000

Table 5

and

MHz.

will have different demodulator

dwidth limits, which is derived

the reference

lla

. Er

! Refe

e sourc

found. and Table 7 below shows the limits f

oth

SEL0

JP1

SEL1

JP2

Demod.

(hertz)

Shortest

Pulse

(µsec)

Maxim

baud r

50% Duty

Cycle (Hz)

. JP1

JP2 setting, 433.92

Othe frequ cies

ban

from

osci tor fr uency

ror

renc

e not

or the

ate for

er two most used frequencies.

Short

1565

416

1204

Open

Short

3130

208

2408

Short

Open

6261

104

4816

Open

12523

9633

Table 6. JP1 and JP2 setting, 418.0 MHz.

JP2

(he

Pulse

(µsec)

Maximum

baud rate for

50% Duty

Cycle (Hz)

EL0

JP1

EL1

emod.

Shorte

rtz)

Short

445

1123

Open

Short

223

2246

Short

Open

4700

111

4493

Open

9400

8987

Table 7. JP1 and JP2 se

AGC

Capacitor

and

Data

Capacitor Seletion

Capacitors C6 and C4 are CTH

respectively

tting, 315 MHz.

Slicer

Threshold

and CAGC capacitors

providing a time base reference for the

data pattern received. These capacitors are selected

according to data profile, pulse duty cycle, dead time

between two received data packets, and if the data

pattern does has or not have a preamble. See Figure

8 for example of a data profile.

f a Data Profile.

best results, they shou

ways be optimized for

data

ern

baud rate increases, the

acit

able 8 shows suggested

ata, 50% duty cycle.

)

Cth

Cagc

Fig e 8. Ex mple o

For

the

ld al

patt

used A

ase. T

s th

cap

or valu

dec

values for Manch ster Encoded d

SEL0

JP1

SEL1

JP2

Demod.

(hertz

Short

1625

100nF

4.7µF

Open

Short

3250

47nF

2.2µF

Short

Open

6500

22nF

1µF

Open

13000

10nF

0.47µF

Table 8. Suggested CTH and CAGC Values.

JP3 and JP4 are jumpers selectable to high or low

and used to configure the digital squelch function.

When it is tied to high, there is no squelch applied to

the digital circuits and the DO (data out) pin has a

hash signal. When the pin is low, the DO pin activity is

considerably reduced. It will have more or less than

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