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MICRF219 数据表(PDF) 4 Page - Micrel Semiconductor |
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MICRF219 数据表(HTML) 4 Page - Micrel Semiconductor |
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4 / 24 page ![]() Micrel MICRF219 January 2009 4 M9999-011509 (408) 944-0800 Condition Min Typ Max Units Parameter Reference Osci Bias Voltage llator RO2 15 V 1. Reference Osci Input Range llat 0 1.5 Vp-p or .2 Reference Oscillator urrent = 0V 300 µA Source C V(REFOSC) Demodulator FREFOSC = 9.81563 MHz 165 CTH Source kΩ Impedance FREFOSC = 13.52127MHz 120 CTH Leakage Cur TA = +105ºC 2 800 nA nA rent TA = 25ºC ± ± Demodulator Filter Bandwidth @ 315M Programmable, see application section 1170 9400 Hz Hz Demodulator Filter ee application se tion 1625 13000 Hz Programmable, s Bandwidth @ 434MHz c Digital / Control Functions DO pin output curr sink @ 0.2 Vdd 260 600 µA ent As output source @ 0.8 Vdd Output rise and fall ti CI = 15pF, pin DO, 10-90% 2 µsec mes Input High Voltage Pins SCLK, DO (As input), SHDN,SEL0, L1,SQ 0.8Vdd V SE Input Low Voltage DO (As input), SHDN EL0 0.2Vdd V Pins SCLK, , S , SEL1,SQ Output Voltage Hig DO 0.8Vdd V h Output Voltage Lo DO 0.2Vdd V w RSSI -100dBm 0.4 RSSI DC Output Voltage Range -40dBm 2.0 V RSSI response slope -110dBm to -40dBm 25 mV/dB RSSI Output Current 400 µA RSS Ω I Output Impedance 250 RSSI Response Time 50% data duty cycle, input power to Antenna = -20dBm 0.3 sec Note 1. Exceeding the absolute maximum rating may damage the device. Note 2. The device is not guaranteed to function outside of its operating rating. Note 3. Device is ESD sensitive. Use appropriate ESD precautions. Exceeding the absolute maximum rating may damage the device. Note 4. Sensitivity is defined as the average signal level measured at the input necessary to achieve 10-2 BER (bit error rate). The input signal is defined as a return-to-zero (RZ) waveform with 50% average duty cycle (Manchester encoded) at a data rate of 1kbps. Note 5. When data burst does not contain preamble, duty cycle is defined as total duty cycle, including any “quiet” time between data bursts. When data bursts contain preamble sufficient to charge the slice level on capacitor CTH, then duty cycle is the effective duty cycle of the burst alone. [For example, 100msec burst with 50% duty cycle, and 100msec “quiet” time between bursts. If burst includes preamble, duty cycle is TON/(TON+tOFF)= 50%; without preamble, duty cycle is TON/(TON+ TOFF + TQUIET) = 50msec/(200msec)=25%. TON is the (Average number of 1’s/burst) × bit time, and TOFF = (TBURST – TON.) |
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