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MICRF219 数据表(PDF) 17 Page - Micrel Semiconductor |
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MICRF219 数据表(HTML) 17 Page - Micrel Semiconductor |
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17 / 24 page ![]() Micrel MICRF219 ycle, Figure 12. Time-to-Good-Data After Shut Do 315MHz at Room Temperat wn C ure. y th se in inp igure High at the SCLK pin tri-states the DO pin, en bling the external drive into the DO pin with an initial low level. The start sequence is completed by taking SCLK low, then high while DO is low, followed by taking DO high, then low while SCLK is high. The serial interface is initialized and ready to receive the Serial Register Programming Programming the device is accomplished b of pins DO and SCLK. Normally, D0 (P outputting data and needs to switch to an made by the start sequence, as shown at F January 2009 17 M9999-011509 (408) 944-0800 e u 10) is ut pin 13. a programming data. BIT TIME 1 BIT TIME 0 DO AS OUTPUT DO INPUT BITS: T1 T2 T3 T4 T5 T8 T9 D19 “19” “0” “0” D18 D1 SCLK T6 T7 “1” 7 BIT TIME 2 nce. Bits are serially programmed starting with the most significant bit (MSB = D19) if all bits are being programmed until the least significant bit (LSB =D0) For instance, if only the desense bits D0, D1, and D2 are being programmed, then these are the only bits that need to be programmed with the start sequence D2, D1, D0, plus the stop sequence. Or, if only the squelch bit D17 is needed, then the sequence must be from start sequence, D17 through D0 plus the stop sequence, making sure the other bits (besides D17) is recommended that EL1, and SQ) be kept interface. After the , a stop sequence (as d the mode and reestablish the DO pin as an output again. To do so, pin is kept high while the DO pin changes to high, then low again, followed by the low. Timing of the programming bits are not critical, but should be kept as shown below: T1 < 0.1 us, Time from SCLK to convert DO to input pin T6 > 0.1 us, SCLK high time T7 > 0.1 us, SCLK low time .1 us Figure 13. Serial Interface Start Seque are programmed as needed. It all parallel input pins (SEL0, S high when using the serial programming bits are finished shown in Figure 14) is required to en the SCLK from low SCLK pin made T2, T3, T4, T5, T8, T9, T10 > 0 DO PIN AS OUTPUT DO D1 “1” “0” “1” DO SCLK T10 BIT TIME 18 BIT TIME 19 Figure 14. Serial Interface Stop Sequence. |
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