TMS320VC33

DIGITAL SIGNAL PROCESSOR

SPRS087E − FEBRUARY 1999 − REVISED JANUARY 2004

26

POST OFFICE BOX 1443

PARAMETER

TEST CONDITIONS‡

MIN

TYP§

MAX

UNIT

VOH

High-level output voltage

DVDD = MIN,IOH = MAX

2.4

V

VOL

Low-level output voltage

DVDD = MIN,IOL = MAX

0.4

V

IZ

High-impedance current

DVDD = MAX

− 5

+ 5

µA

II

Input current

VI = VSS to DVDD

− 5

+ 5

µA

IIPU

Input current (with internal pullup)

Inputs with internal pullups¶

− 600

10

µA

IIPD

Input current (with internal pulldown)

Inputs with internal pulldowns¶

600

− 10

µA

IBKU

Input current (with bus keeper) pullup#

Bus keeper opposes until conditions match

− 600

10

µA

IBKD

Input current (with bus keeper) pulldown#

600

− 10

µA

IDDD

Supply current, pins||

k

TC = 25°C,

fx = 60 MHz

VC33-120

20

120

mA

IDDD

Supply current, pins||

k

TC = 25 C,

DVDD = MAX

fx = 75 MHz

VC33-150

25

150

mA

IDDC

Supply current, core CPU||

k

TC = 25°C,

fx = 60 MHz

VC33-120

50

80

mA

IDDC

Supply current, core CPU||

k

TC = 25 C,

CVDD = MAX

fx = 75 MHz

VC33-150

60

100

mA

PLL enabled, oscillator enabled

2

mA

IDD

IDLE2, Supply current, IDDD plus IDDC

PLL disabled, oscillator enabled

500

A

IDD

IDLE2, Supply current, IDDD plus IDDC

PLL disabled, oscillator disabled, FCLK = 0

100

µA

Ci

Input capacitance

All inputs except XIN

10

pF

Ci

Input capacitance

XIN

10

pF

Co

Output capacitance

10

pF

† All voltage values are with respect to VSS.

‡ For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table.

§ For VC33, all typical values are at DVDD = 3.3, CVDD = 1.8 V, TC (case temperature) = 25°C.

¶ Pins with internal pullup devices: TDI, TCK, and TMS. Pin with internal pulldown device: TRST.

# Pins D0−D31 include internal bus keepers that maintain valid logic levels when the bus is not driven (see Figure 9).

|| Actual operating current is less than this maximum value. This value was obtained under specially produced worst-case test conditions, which

are not sustained during normal device operation. These conditions consist of continuous parallel writes of a checkerboard pattern at the

maximum rate possible. See TMS320C3x General-Purpose Applications User’s Guide (literature number SPRU194).

PARAMETER MEASUREMENT INFORMATION

Tester Pin

Electronics

VLoad

IOL

IOH

Output

Under

Test

50

Ω

Where:

IOL

= 4 mA (all outputs) for DC levels test.

IO and IOH are adjusted during AC timing analysis to achieve an AC termination of 50 Ω

VLOAD =DVDD/2

CT

= 40-pF typical load-circuit capacitance

Figure 15. Test Load Circuit