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TMS320VC33 数据表(PDF) 3 Page - Texas Instruments |
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TMS320VC33 数据表(HTML) 3 Page - Texas Instruments |
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3 / 57 page ![]() TMS320VC33 DIGITAL SIGNAL PROCESSOR SPRS087E − FEBRUARY 1999 − REVISED JANUARY 2004 3 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 pinout DVDD CLKR0 FSR0 VSS DR0 TRST TMS CVDD TDI TDO TCK VSS EMU0 EMU1 DVDD D0 D1 D2 D3 VSS D4 D5 DVDD D6 D7 CVDD D8 D9 VSS D10 D11 DVDD D12 D13 D14 D15 A20 VSS A19 A18 A17 DVDD A16 A15 VSS A14 A13 CVDD A12 A11 DVDD A10 A9 VSS A8 A7 A6 A5 DVDD A4 VSS A3 A2 CVDD A1 A0 DVDD PAGE3 PAGE2 VSS PAGE1 PAGE0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 PGE PACKAGE†‡ (TOP VIEW) † DVDD is the power supply for the I/O pins while CVDD is the power supply for the core CPU. VSS is the ground for both the I/O pins and the core CPU. ‡ PLLVDD and PLLVSS are isolated PLL supply pins that should be externally connected to CVDD and VSS, respectively. The TMS320VC33 device is packaged in 144-pin low-profile quad flatpack (PGE Suffix). |
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