TMS320VC33 datasheet(27/57 Pages) TI

27 / 57 page

TMS320VC33

DIGITAL SIGNAL PROCESSOR

SPRS087E − FEBRUARY 1999 − REVISED JANUARY 2004

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

PARAMETER MEASUREMENT INFORMATION

timing parameter symbology

Timing parameter symbols used herein were created in accordance with JEDEC Standard 100. In order to

shorten the symbols, some of the pin names and other related terminology have been abbreviated as follows,

unless otherwise noted:

Lowercase subscripts and their meanings

Letters and symbols and their meanings

access time

High

cycle time (period)

Low

delay time

Valid

dis

disable time

High Impedance

enable time

fall time

hold time

rise time

setup time

transition time

valid time

pulse duration (width)

unknown, changing, or don’t care level

Additional symbols and their meaning

Address lines (A23 − A0)

H1 and H3

ASYNCH

Asynchronous reset signals (XF0, XF1, CLKX0, DX0,

FSX0, CLKR0, DR0, FSR0, TCLK0, and TCLK1)

HOLD

CLKX

CLKX0

HOLDA

CLKR

CLKR0

IACK

CONTROL

Control signals

INT

INT3 − INT0

Data lines (D31 − D0)

PAGE

PAGE0 − PAGE3

RDY

R / W

EXTCLK

R / W

FSX/R

RESET

FSX

FSX0

STRB

FSR

FSR0

SCK

CLKX/R

GPI

General-purpose input

SHZ

GPIO

General-purpose input/output; peripheral pin (CLKX0,

CLKR0, DX0, DR0, FSX0, FSR0, TCLK0, and TCLK1)

TCLK

TCLK0, TCLK1, or TCLKx

GPO

General-purpose output

XF0, XF1, or XFx

XF0

XF1

XIN

TMS320VC33 数据表(PDF) 27 Page - Texas Instruments

TMS320VC33 数据表(HTML) 27 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57

数据表下载