ADP8860ACPZ-R7 datasheet(13/52 Pages) AD

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ADP8860

Rev. 0 | Page 13 of 52

POWER STAGE

Because typical white LEDs require up to 4 V to drive them,

some form of boosting is required over the typical variation in

battery voltage. The ADP8860 accomplishes this with a high

efficiency charge pump capable of producing a maximum IOUT

of 240 mA over the entire input voltage range (2.5 V to 5.5 V).

Charge pumps use the basic principle that a capacitor stores

charge based on the voltage applied to it, as shown in the

following equation:

Q = C × V

(1)

By charging the capacitors in different configurations, the

charge, and therefore the gain, can be optimized to deliver

the voltage required to power the LEDs. Because a fixed

charging and discharging combination must be used, only

certain multiples of gain are available. The ADP8860 is capable

of automatically optimizing the gain (G) from 1×, 1.5×, and 2×.

These gains are accomplished with two capacitors (labeled C1

and C2 in Figure 26) and an internal switching network.

In G = 1× mode, the switches are configured to pass VIN

directly to VOUT. In this mode, several switches are connected

in parallel to minimize the resistive drop from input to output.

In G = 1.5× and 2× modes, the switches alternatively charge

from the battery and discharge into the output. For G = 1.5×,

the capacitors are charged from VIN in series and are discharged

to VOUT in parallel. For G = 2×, the capacitors are charged

from VIN in parallel and are discharged to VOUT in parallel. In

certain fault modes, the switches are opened and the output is

physically isolated from the input.

Automatic Gain Selection

Each LED that is driven requires a current source. The voltage

on this current source must be greater than a minimum head-

room voltage (200 mV typical) to maintain accurate current

regulation. The gain is automatically selected based on the

minimum voltage (VDx) at all of the current sources. At startup,

the device is placed into G = 1× mode and the output charges

to VIN. If any VDx level is less than the required headroom

(200 mV), the gain is increased to the next step (G = 1.5×).

A 100 μs delay is allowed for the output to stabilize prior to

the next gain switching decision. If there remains insufficient

current sink headroom, then the gain is increased again to 2×.

Conversely, to optimize efficiency, it is not desirable for the

output voltage to be too high. Therefore, the gain reduces when

the headroom voltage is great enough. This point (labeled

VDMAX in Figure 27) is internally calculated to ensure that the

lower gain still results in ample headroom for all the current

sinks. The entire cycle is illustrated in Figure 27.

Note that the gain selection criteria apply only to active current

sources. If current sources have been deactivated through an

I2C command (for example, only five LEDs are used), then the

voltages on the deactivated current sources are ignored.

ADP8860ACPZ-R7 数据表(PDF) 13 Page - Analog Devices

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