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ADP8860ACPZ-R7 数据表(PDF) 21 Page - Analog Devices |
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ADP8860ACPZ-R7 数据表(HTML) 21 Page - Analog Devices |
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21 / 52 page ![]() ADP8860 Rev. 0 | Page 21 of 52 SCx_EN Program all fade, on, and off timers before enabling any of the LED current sinks. If ISCx is on during a blink cycle and SCx_EN is cleared, it turns off (or fades to off if fade out is enabled). If ISCx is off during a blink cycle and SCx_EN is cleared, it stays off. MAX SCx CURRENT FADE-IN FADE-OUT FADE-IN FADE-OUT ON TIME ON TIME OFF TIME OFF TIME SET BY USER Figure 41. Independent Sink Blink Mode with Fading SHORT-CIRCUIT PROTECTION MODE The ADP8860 can protect against short circuits on the output (VOUT). Short-circuit protection (SCP) is activated at the point when VOUT < 55% of VIN. Note that this SCP sensing is disabled during both start-up and restart attempts (fault recovery). SCP sensing reenables 4 ms (typical) after activation. During a short- circuit fault, the device enters a low current consumption state and an interrupt flag is set. The device can be restarted at any time after receiving a short-circuit fault by simply rewriting nSTBY = 1. It then repeats another complete soft start sequence. Note that the value of the output capacitance (COUT) should be small enough to allow VOUT to reach approximately 55% (typical) of VIN within the 4 ms (typical) time. If COUT is too large, the device inadvertently enters short-circuit protection. OVERVOLTAGE PROTECTION Overvoltage protection (OVP) is implemented on the output. There are two types of overvoltage events: normal (no fault) and abnormal (from a fault or sudden load change). Normal Overvoltage In a normal (no fault) overvoltage, the output voltage approaches VOUT(REG) (4.9 V typical) during normal operation. This is not caused by a fault or load change, but it is simply a consequence of the input voltage times the gain reaching the same level as the clamped output voltage (VOUT(REG)). To prevent this type of over- voltage, the ADP8860 detects when the output voltage rises to VOUT(REG). It then increases the effective ROUT of the gain stage to reduce the voltage that is delivered. This effectively regulates VOUT to VOUT(REG); however, there is a limit to the effect that this system can have on regulating VOUT. It is designed only for normal operation and it is not intended to protect against faults or sudden load changes. When the output voltage is regulated to VOUT(REG) no interrupt is set and the operation is transparent to the LEDs and the overall application. Abnormal Overvoltage Because of the open-loop behavior of the charge pump as well as how the gain transitions are computed, a sudden load change or fault can abnormally force VOUT beyond 6 V. This causes an abnormal overvoltage situation. If the event happens slowly enough, the system first tries to regulate the output to 4.9 V as in a normal overvoltage scenario. However, if this is not sufficient, or if the event happens too quickly, then the ADP8860 enters overvoltage protection (OVP) mode when VOUT exceeds the OVP threshold (typically 5.8 V). In the OVP mode, only the charge pump is disabled to prevent VOUT from rising too high. The current sources and all other device functionality remain intact. When the output voltage falls by about 500 mV (to 5.3 V typical), the charge pump resumes operation. If the fault or load step recurs, the process may repeat. An interrupt flag is set at each OVP instance. THERMAL SHUTDOWN/OVERTEMPERATURE PROTECTION If the die temperature of the ADP8860 rises above a safe limit (150°C typical), the controllers enter thermal shutdown (TSD) protection mode. In this mode, most of the internal functions shut down, the part enters standby, and the TSD_INT interrupt is set. When the die temperature decreases below ~130°C, the part can be restarted. To restart the part, simply remove it from standby. No interrupt is generated when the die temperature falls below 130°C. However, if the software clears the pending TSD_INT interrupt and the temperature remains above 130°C, another interrupt is generated. The complete state machine for these faults (SCP, OVP, and TSD) is shown in Figure 42. |
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