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9/27/00

SPT5510

THEORY OF OPERATION

The SPT5510 is a segmented 16-bit current-output DAC.

The four MSBs, D15–D12, are decoded to fifteen unit cells

(current sinks). The remaining bits (D11–D0) are binary;

bits D9–D0 are derived from an R-2R ladder. All cells are

laser trimmed for maximum accuracy. The block diagram

shows the basic architecture.

All output cells are always on, with the data determining

This provides nearly constant power dissipation indepen-

dent of data and clock rate. It also reduces noise transients

on power and ground lines.

The reference loop utilizes an MSB-weighted cell and pro-

vides a gain of about 16 to the output. The on-chip refer-

ence amplifier has very high open-loop gain and is offset

trimmed to provide a very low temperature drift (typically

<10 ppm/

°C gain drift).

POWER SUPPLY AND GROUNDING

The SPT5510 requires a single –5.2V power supply. All

supply pins attach to a common on-chip power bus and

should be treated as analog supplies. For best settling per-

formance, each supply pin should be decoupled as shown

in figure 1 – typical interface circuit.

There are three separate on-chip ground busses. DGND

pins should be tied together and connected to system

ground through a ferrite bead. REFGND and OGND pins

should be tied directly to the SPT5510’s ground plane and

connected to system ground through a ferrite bead. It is

critical that REFGND and OGND are very tightly coupled,

as any differential signal (dc offset, noise, etc.) will be

transmitted to the output. Two of the OGND pins can be

disconnected from the ground plane and used as sense

lines for a current-to-voltage converter, as shown in the

OUTPUTS section.

1

2

3

4

5

6

7

8

25

26

27

28

29

30

31

32

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

C12

10 pF

C13

20 pF

50

41

36

C1–C13 — SURFACE MOUNT CERAMIC CHIP

C14–C17 — TANTALUM

R1–R6 — CARBON FILM 1/4 W

R7–R10 — SURFACE MOUNT CERAMIC CHIP

FB — FERRITE BEAD is to be located as closely

to the device as possible.

SPT5510

R10

FB

Input

Data

Output

Complementary

Output

Figure 1 – Typical Interface Circuit