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AD8155ACPZ-R7 数据表(PDF) 23 Page - Analog Devices |
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AD8155ACPZ-R7 数据表(HTML) 23 Page - Analog Devices |
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23 / 36 page ![]() AD8155 Rev. 0 | Page 23 of 36 Power Saving Considerations Whereas the AD8155 power consumption is very low compared to similar devices, careful control of its operating conditions can yield further power savings. Significant power reduction can be realized by operating the part at a lower voltage. Compared to 3.3 V operation, a supply voltage of 1.8 V can result in power savings of ~45%. There is no performance penalty when oper- ting at lower voltage. An initialization sequence is required to enable the AD8155 in a low power mode (see the Applications Information section). A second measure is to disable transmitters when they are not being used. This can be done on a static basis if the output is not used or on a dynamic basis if the output does not have a constant stream of traffic. On transmit disable (Register 0x48, Register 0x88, Register 0xC8), both the predriver and output switch currents are disabled. The LOS-activated squelch disables only the output switch current, ITOT. Superior power saving is achieved by using the TX and RX disable registers to turn off an unused lane as opposed to relying on the AD8155 transmit squelch feature. Because the majority of the power dissipated is in the output stage, some of its flexibility can be used to lower the power consumption. First, the output current and output preemphasis settings can be programmed to the smallest amount required to maintain BER performance. If an output circuit always has a short length and the receiver has good sensitivity, then a lower output current can be used. It is also possible to lower the voltage on VTTO to lower the power dissipation. The amount that VTTO can be lowered is dependent on the lowest of all the output’s VOL and VCC. This is determined by the output that is operating at the highest programmed output current. Table 1 and Table 19 list minimum output levels. |
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