AD8155ACPZ-R7 datasheet(24/36 Pages) AD

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AD8155

Rev. 0 | Page 24 of 36

I2C CONTROL INTERFACE

SERIAL INTERFACE GENERAL FUNCTIONALITY

The AD8155 register set is controlled through a 2-wire I2C

interface. The AD8155 acts only as an I2C slave device. The

7-bit slave address for the AD8155 I2C interface contains the

static value b1010 for the upper four bits. The lower three bits

are controlled by the input pins, I2C_A[2:0].

Therefore, the I2C bus in the system must include an I2C master

to configure the AD8155 and other I2C devices that may be on

the bus. Data transfers are controlled through the use of the two

I2C wires: the SCL input clock pin and the SDA bidirectional

data pin.

The AD8155 I2C interface can be run in the standard (64 kHz)

and fast (400 kHz) modes. The SDA line changes value only

when the SCL pin is low, with two exceptions. To indicate the

beginning or continuation of a transfer, the SDA pin is driven

low while the SCL pin is high, and to indicate the end of a

transfer, the SDA line is driven high while the SCL line is high.

Therefore, it is important to control the SCL clock to toggle

only when the SDA line is stable unless indicating a start,

repeated start, or stop condition.

I2C INTERFACE DATA TRANSFERS: DATA WRITE

To write data to the AD8155 register set, a microcontroller or

any other I2C master must send the appropriate control signals

to the AD8155 slave device. The following steps must be taken,

where the signals are controlled by the I2C master, unless other-

wise specified. For a diagram of the procedure, see Figure 41.

Send a start condition (while holding the SCL line high,

pull the SDA line low).

Send the AD8155 part address (seven bits) whose upper

four bits are the static value b1010 and whose lower three

bits are controlled by the I2C_A[2:0] input pins. This

transfer should be MSB first.

Send the write indicator bit (0).

Wait for the AD8155 to acknowledge the request.

Send the register address (eight bits) to which data is to be

written. This transfer should be MSB first.

Wait for the AD8155 to acknowledge the request.

Send the data (eight bits) to be written to the register whose

address was set in Step 5. This transfer should be MSB first.

Wait for the AD8155 to acknowledge the request.

Do one or more of the following:

Send a stop condition (while holding the SCL line

high, pull the SDA line high) and release control of

the bus.

Send a repeated start condition (while holding the

SCL line high, pull the SDA line low) and continue

with Step 2 in this procedure to perform another write.

Send a repeated start condition (while holding the

SCL line high, pull the SDA line low) and continue

with Step 2 of the read procedure (in the I2C Interface

Data Transfers: Data Read section) to perform a read

from another address.

Send a repeated start condition (while holding the

SCL line high, pull the SDA line low) and continue

with Step 8 of the read procedure (in the I2C Interface

Data Transfers: Data Read section) to perform a read

from the same address set in Step 5.

In Figure 41, the AD8155 write process is shown. The SCL

signal is shown along with a general write operation and a

specific example. In this example, the value 0x92 is written to

Address 0x6D of an AD8155 device with a part address of 0x53.

The part address is seven bits wide and is composed of the

AD8155 static upper four bits (b1010) and the pin-programmable

lower three bits (I2C_A[2:0]). The address pins are set to b011.

In Figure 41, the corresponding step number is visible in the

circle under the waveform. The SCL line is driven by the I2C

master and never by the AD8155 slave. As for the SDA line, the

data in the shaded polygons is driven by the AD8155, whereas

the data in the nonshaded polygons is driven by the I2C master.

The end phase case shown is that of Step 9a.

It is important to note that the SDA line changes only when the

SCL line is low, except for the case of sending a start, stop, or

repeated start condition (Step 1 and Step 9 in this case).

START

R/W ACK

ACK

STOP

DATA

ADDR

[2:0]

b1010

SCL

SDA

Figure 41. I2C Write Diagram

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