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ADP1613ARMZ-R7 数据表(PDF) 14 Page - Analog Devices |
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ADP1613ARMZ-R7 数据表(HTML) 14 Page - Analog Devices |
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14 / 28 page ![]() ADP1612/ADP1613 Rev. A | Page 14 of 28 The output capacitor maintains the output voltage and supplies current to the load while the ADP1612/ADP1613 switch is on. The value and characteristics of the output capacitor greatly affect the output voltage ripple and stability of the regulator. A low ESR ceramic dielectric capacitor is preferred. The output voltage ripple (ΔVOUT) is calculated as follows: OUT ON L OUT C OUT C t I C Q V × = = Δ (8) where: QC is the charge removed from the capacitor. tON is the on time of the switch. COUT is the output capacitance. IL is the average inductor current. SW ON f D t = (9) and OUT IN OUT V V V D − = (10) Choose the output capacitor based on the following equation: OUT OUT SW IN OUT L OUT V V f V V I C Δ × × − × ≥ ) ( (11) Multilayer ceramic capacitors are recommended for this application. DIODE SELECTION The output rectifier conducts the inductor current to the output capacitor and load while the switch is off. For high efficiency, minimize the forward voltage drop of the diode. For this reason, Schottky rectifiers are recommended. However, for high voltage, high temperature applications, where the Schottky rectifier reverse leakage current becomes significant and can degrade efficiency, use an ultrafast junction diode. Ensure that the diode is rated to handle the average output load current. Many diode manufacturers derate the current capability of the diode as a function of the duty cycle. Verify that the output diode is rated to handle the average output load current with the minimum duty cycle. The minimum duty cycle of the ADP1612/ADP1613 is OUT MAX IN OUT MIN V V V D ) ( − = (12) where VIN(MAX) is the maximum input voltage. The following are suggested Schottky diode manufacturers: • ON Semiconductor • Diodes, Inc. LOOP COMPENSATION The ADP1612/ADP1613 use external components to compensate the regulator loop, allowing optimization of the loop dynamics for a given application. The step-up converter produces an undesirable right-half plane zero in the regulation feedback loop. This requires compensating the regulator such that the crossover frequency occurs well below the frequency of the right-half plane zero. The right- half plane zero is determined by the following equation: L R V V RHP F LOAD OUT IN Z × π × ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ = 2 ) ( 2 (13) where: FZ(RHP) is the right-half plane zero. RLOAD is the equivalent load resistance or the output voltage divided by the load current. To stabilize the regulator, ensure that the regulator crossover frequency is less than or equal to one-fifth of the right-half plane zero. The regulator loop gain is OUT CS COMP MEA OUT IN OUT FB VL Z G Z G V V V V A × × × × × = (14) where: AVL is the loop gain. VFB is the feedback regulation voltage, 1.235 V. VOUT is the regulated output voltage. VIN is the input voltage. GMEA is the error amplifier transconductance gain. ZCOMP is the impedance of the series RC network from COMP to GND. GCS is the current sense transconductance gain (the inductor current divided by the voltage at COMP), which is internally set by the ADP1612/ADP1613. ZOUT is the impedance of the load and output capacitor. |
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