IMX35 datasheet(49/148 Pages) FREESCALE

部件名	IMX35

功能描述	i.MX35 Applications Processors for Industrial and Consumer Products

PDF	148 Pages

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制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6

Freescale Semiconductor

NOTE

SDR SDRAM CLK parameters are measured from the 50% point—that is,

“high” is defined as 50% of signal value and “low” is defined as 50% of

signal value.

The timing parameters are similar to the ones used in SDRAM data sheets.

Table 34 indicates SDRAM requirements. All output signals are driven by

the ESDCTL at the negative edge of SDCLK, and the parameters are

measured at maximum memory frequency.

Figure 30. SDRAM Self-Refresh Cycle Timing Diagram

SD7

Address hold time

tAH

1.8

—

SD10

Precharge cycle period1

tRP

clock

SD11

Auto precharge command period1

tRC

clock

1 SD10 and SD11 are determined by SDRAM controller register settings.

Table 34. SDRAM Refresh Timing Parameters (continued)

Parameter

Symbol

Min.

Max.

Unit

SDCLK

CAS

RAS

ADDR

CKE

Don’t care

SD16

IMX35 数据表(PDF) 49 Page - Freescale Semiconductor, Inc

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