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IMX35 数据表(PDF) 90 Page - Freescale Semiconductor, Inc |
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IMX35 数据表(HTML) 90 Page - Freescale Semiconductor, Inc |
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90 / 148 page ![]() i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6 Freescale Semiconductor 90 Figure 66 depicts timing of the 5-wire serial interface (Type 2). For this interface, a separate RS line is added. When a burst is transmitted within a single active chip select interval, the RS can be changed at boundaries of words. Figure 66. 5-Wire Serial Interface (Type 2) Timing Diagram Preamble DISPB_D#_CS DISPB_SD_D_CLK DISPB_SD_D RW Output data D7 D6 D5 D4 D3 D2 D1 D0 DISPB_SD_D (Output) (Input) Preamble DISPB_D#_CS DISPB_SD_D_CLK DISPB_SD_D RW Input data DISPB_SD_D D7 D6 D5 D4 D3 D2 D1 D0 (Output) (Input) Write Read DISPB_SER_RS DISPB_SER_RS 1 display IF clock cycle 1 display IF clock cycle 1 display IF clock cycle 1 display IF clock cycle 1 display IF clock cycle 1 display IF clock cycle |
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