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MPC8377EVRALDA 数据表(PDF) 69 Page - Freescale Semiconductor, Inc |
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MPC8377EVRALDA 数据表(HTML) 69 Page - Freescale Semiconductor, Inc |
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69 / 124 page  MPC8377E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2 Freescale Semiconductor 69 Serial ATA (SATA) Table 55 provides the differential transmitter output AC characteristics for the SATA interface at Gen1i or 1.5 Gbits/s transmission. 16.2.2 Gen2i/3G Transmitter Specifications Table 56 provides the differential transmitter output DC characteristics for the SATA interface at Gen2i or 3.0 Gbits/s transmission. Table 57 provides the differential transmitter output AC characteristics for the SATA interface at Gen2i or 3.0 Gbits/s transmission. Table 55. Gen1i/1.5G Transmitter AC Specifications Parameter Symbol Min Typical Max Units Notes Channel speed tCH_SPEED — 1.5 — Gbps — Unit interval TUI 666.4333 666.667 670.2333 ps — Total jitter, data-data 5UI USATA_TXTJ5UI — — 0.355 UIp-p 1 Total jitter, data-data 250 UI USATA_TXTJ250UI — — 0.47 UIp-p 1 Deterministic jitter, data-data 5UI USATA_TXDJ5UI — — 0.175 UIp-p 1 Deterministic jitter, data-data 250 UI USATA_TXDJ250UI — — 0.22 UIp-p 1 Note: 1 Measured at Tx output pins peak to peak phase variation, random data pattern. Table 56. Gen 2i/3G Transmitter DC Specifications Parameter Symbol Min Typical Max Units Notes Tx differential output voltage VSATA_TXDIFF 400 550 700 mVp-p 1 Tx differential pair impedance ZSATA_TXDIFFIM 85 100 115 Ω — Note: 1 Terminated by 50 Ω load. Table 57. Gen 2i/3G Transmitter AC Specifications Parameter Symbol Min Typical Max Units Notes Channel speed tCH_SPEED —3.0 — Gbps — Unit interval TUI 333.2 333.33 335.11 ps — Total jitter fC3dB=fBAUD/10 USATA_TXTJfB/10 —— 0.3 UIp-p 1 Total jitter fC3dB =fBAUD/500 USATA_TXTJfB/500 — — 0.37 UIp-p 1 |
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