MPC8377EVRALDA datasheet(11/124 Pages) FREESCALE

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MPC8377E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

Power Characteristics

Please note that the SerDes power supply (L[1,2]_nVDD) should follow the same timing as the core supply

(VDD).

The opposite sequence applies to the power down requirements. The I/O supplies must go down first and

immediately followed by the core and PLL supplies.

Power Characteristics

The estimated typical power dissipation for the MPC8377E device is shown in Table 5.

Table 5. MPC8377E Power Dissipation 1

Core Frequency

(MHz)

CSB/DDR Frequency

(MHz)

Sleep Power

at Tj =65°C (W)

Typical Application

at Tj =65°C (W)

Typical Application

at Tj =125°C (W)

Max Application

at Tj =125°C (W)

333

1.45

1.9

3.2

3.8

167

1.45

1.8

3.0

3.6

400

1.45

2.0

3.3

4.0

266

1.45

1.9

3.1

3.8

450

300

1.45

2.0

3.2

3.8

225

1.45

1.9

3.1

3.7

500

333

1.45

2.0

3.3

3.9

250

1.45

1.9

3.2

3.8

533

355

1.45

2.0

3.3

4.0

266

1.45

2.0

3.2

3.9

600

400

1.45

2.1

3.4

4.1

300

1.45

2.0

3.3

4.0

667

333

1.45

2.1

3.3

4.1

266

1.45

2.0

3.3

3.9

800

400

1.45

2.5

3.8

4.3

Note:

1 The values do not include I/O supply power (OV

DD, LVDD, GVDD) or AVDD. For I/O power values, see Table 6.

2 Typical power is based on a voltage of V

DD = 1.0 V for core frequences ≤ 667 MHz or VDD = 1.05 V for core frequences of

800 MHz, and running a Dhrystone benchmark application.

3 Typical power is based on a voltage of V

DD = 1.0 V for core frequences ≤ 667 MHz or VDD = 1.05 V for core frequences of

800 MHz, and running a Dhrystone benchmark application.

4 Maximum power is based on a voltage of V

DD = 1.0 V for core frequences ≤ 667 MHz or VDD = 1.05 V for core frequences of

800 MHz, worst case process, and running an artificial smoke test.

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