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ADN2531ACPZ-R2 数据表(PDF) 4 Page - Analog Devices |
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ADN2531ACPZ-R2 数据表(HTML) 4 Page - Analog Devices |
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4 / 20 page ![]() ADN2531 Rev. 0 | Page 4 of 20 Parameter Min Typ Max Unit Test Conditions/Comments POWER SUPPLY VCC 3.0 3.3 3.6 V ICC8 36 mA VBSET = VMSET = 0 V ISUPPLY9 55 62 mA VBSET = VMSET = 0 V 1 The voltage between the pin with the specified compliance voltage and GND. 2 Specified for TA = −40°C to +85°C due to test equipment limitation. See the section for data on performance for TA = −40°C to +100°C. Typical Performance Characteristics 3 The pattern used is composed of a repetitive sequence of eight 1s followed by eight 0s at 10.7 Gbps. 4 Measured using the high speed characterization circuit shown in Figure 22. 5 The pattern used is K28.5 (00111110101100000101) at 10.7 Gbps rate. 6 The pattern used is K28.5 (00111110101100000101) at 11.3 Gbps rate. 7 Measured at balanced IMODP and IMODN. 8 Only includes current in the ADN2531 VCC pins. 9 Includes current in ADN2531 VCC pins and dc current in IMODP and IMODN pull-up inductors. See the section for total supply current calculation. Power Consumption PACKAGE THERMAL SPECIFICATIONS Table 2. Parameter Min Typ Max Unit Test Conditions/Comments θJ-TOP 65 72.2 79.4 °C/W Thermal resistance from junction to top of package. θJ-PAD 2.6 5.8 10.7 °C/W Thermal resistance from junction to bottom of exposed pad. IC Junction Temperature 125 °C 90% 10% ALS IBIAS AND IMOD ALS ASSERT TIME ALS NEGATE TIME t t Figure 2. ALS Timing Diagram |
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