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ADN2531ACPZ-R2 数据表(PDF) 13 Page - Analog Devices |
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ADN2531ACPZ-R2 数据表(HTML) 13 Page - Analog Devices |
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13 / 20 page ![]() ADN2531 Rev. 0 | Page 13 of 20 The equivalent circuits for the MSET, IMODP, and IMODN pins are shown in Figure 32 and Figure 33. The two 50 Ω resistors in Figure 33 represent the active back-termination resistance. VCC MSET 400 Ω 200 Ω VCC Figure 32. Equivalent Circuit of the MSET Pin VCC VCC 7.7 Ω 7.7 Ω 50 Ω IMODP IMODN 50 Ω Figure 33. Equivalent Circuit of the IMODP and IMODN Pins The recommended configuration of the MSET, IMODP, and IMODN pins is shown in Figure 34. See Table 6 for recom- mended components. When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows into the IMODP pin and out of the IMODN pin, generating an optical Logic 1 level at the TOSA output when the TOSA is connected as shown in Figure 34. ADN2531 MSET VMSET GND IMODN IMODP C FP/DFB TOSA Z0 = 25Ω Z0 = 25Ω C Z0 = 25Ω ZL = 100Ω Z0 = 25Ω L VCC L VCC VCC L L IBIAS Figure 34. Recommended Configuration for the MSET, IMODP, and IMODN Pins The ratio between the voltage applied to the MSET pin and the differential modulation current available at the IMODP and IMODN pins is a function of the load resistance value, as shown in Figure 35. 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 0 1020304050 60 DIFFERENTIAL RLOAD (Ω) MAXIMUM TYPICAL MINIMUM Figure 35. MSET Voltage to Modulation Current Ratio vs. Differential Load Resistance Using the resistance of the TOSA, the user can calculate the voltage range that should be applied to the MSET pin to generate the required modulation current range (see the example in the Applications Information section). The circuit used to drive the MSET voltage must be able to drive the 600 Ω resistance of the MSET pin. To be able to drive 80 mA modulation currents through the differential load, the output stage of the ADN2531 (IMODP and IMODN pins) must be ac-coupled to the load. The voltages at these pins have a dc component equal to VCC and an ac component with single-ended peak-to-peak amplitude of IMOD × 50 Ω. This is the case when the load impedance (RTOSA) is less than 100 Ω differential because the transmission line characteristic impedance sets the peak-to- peak amplitude. For the case where RTOSA is greater than 100 Ω, the single-ended, peak-to-peak amplitude is IMOD × RTOSA ÷ 2. For proper operation of the output stage, the voltages at the IMODP and IMODN pins must be between the compliance voltage specifications for this pin over supply, temperature, and modulation current range, as shown in Figure 36. See the Headroom Calculations section for examples of headroom calculations. VIMODP, VIMODN VCC VCC – 1.1V VCC + 1.1V NORMAL OPERATION REGION Figure 36. Allowable Range for the Voltage at IMODP and IMODN |
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