ATmega162 datasheet(56/324 Pages) ATMEL

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2513K–AVR–07/09

ATmega162/V

Timed Sequences

for Changing the

Configuration of

the Watchdog

Timer

The sequence for changing configuration differs slightly between the three safety levels. Sepa-

rate procedures are described for each level.

Safety Level 0

This mode is compatible with the Watchdog operation found in ATmega161. The Watchdog

Timer is initially disabled, but can be enabled by writing the WDE bit to one without any restric-

tion. The Time-out period can be changed at any time without restriction. To disable an enabled

Watchdog Timer, the procedure described on page 53 (WDE bit description) must be followed.

Safety Level 1

In this mode, the Watchdog Timer is initially disabled, but can be enabled by writing the WDE bit

to one without any restriction. A timed sequence is needed when changing the Watchdog Time-

out period or disabling an enabled Watchdog Timer. To disable an enabled Watchdog Timer,

and/or changing the Watchdog Time-out, the following procedure must be followed:

In the same operation, write a logic one to WDCE and WDE. A logic one must be written

to WDE regardless of the previous value of the WDE bit.

Within the next four clock cycles, in the same operation, write the WDE and WDP bits as

desired, but with the WDCE bit cleared.

Safety Level 2

In this mode, the Watchdog Timer is always enabled, and the WDE bit will always read as one. A

timed sequence is needed when changing the Watchdog Time-out period. To change the

Watchdog Time-out, the following procedure must be followed:

In the same operation, write a logical one to WDCE and WDE. Even though the WDE

always is set, the WDE must be written to one to start the timed sequence.

Within the next four clock cycles, in the same operation, write the WDP bits as desired,

but with the WDCE bit cleared. The value written to the WDE bit is irrelevant.

ATmega162 数据表(PDF) 56 Page - ATMEL Corporation