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HT56R656 数据表(PDF) 6 Page - Holtek Semiconductor Inc |
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HT56R656 数据表(HTML) 6 Page - Holtek Semiconductor Inc |
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6 / 108 page  The following tables depict the device dependent pins. Pin Name I/O Configuration Option Description HT56R62 VMAX I ¾ IC maximum voltage, connect to VDD,VLCD1 or V1 VLCD1/VLCD2/V1, C1, C2 ¾¾ LCD Voltage pump pins for C-type biasing. For R-type biasing only pin VLCD1 are used. SEG0~SEG4 SEG5/SDO SEG6/SDI/SDA SEG7/SCK/SCL SEG8/SCS SEG9/PCLK SEG10/PINT SEG11~SEG23 O O I/O I/O I/O O I/O O SIM PINT SEG0~SEG23 are LCD driver outputs for LCD panel segments. SEG5 is pin-shared with the SPI bus data output line, SDO. SEG6 is pin-shared with the SPI bus data input line, SDI and the I 2C Bus data line SDA. SEG7 is pin-shared with the SPI bus clock line, SCK and the I 2C Bus clock line SCL. SEG8 is pin-shared with the SPI bus select line, SCS. SEG9 is pin-shared with the Peripheral Clock line, PCLK. SEG10 is pin-shared with the Peripheral Interrupt line, PINT. The SEG0~SEG15 lines can be can be chosen to be either segment driv- ers or CMOS outputs using control bits in the LCD control registers. COM0~COM2 COM3/SEG24 O ¾ COM0~COM2 are the LCD common outputs. A bit in the LCD Control Register determines if pin COM3/SEG24 is configured as a segment driver or as a common output driver. HT56R65 VMAX I ¾ IC maximum voltage, connect to VDD,VLCD1 or V1 VLCD1/VLCD2/V1, C1, C2 ¾¾ LCD Voltage pump pins for C-type biasing. For R-type biasing only pin VLCD1 are used. SEG0~SEG15 SEG16/SDO SEG17/SDI/SDA SEG18/SCK/SCL SEG19/SCS SEG20/PCLK SEG21/PINT SEG22~SEG39 O O I/O I/O I/O O I/O O SIM PINT SEG0~SEG39 are LCD driver outputs for LCD panel segments. SEG16 is pin-shared with the SPI bus data output line, SDO. SEG17 is pin-shared with the SPI bus data input line, SDI and the I 2C Bus data line SDA. SEG18 is pin-shared with the SPI bus clock line, SCK and the I 2C Bus clock line SCL. SEG19 is pin-shared with the SPI bus select line, SCS. SEG20 is pin-shared with the Peripheral Clock line, PCLK. SEG21 is pin-shared with the Peripheral Interrupt line, PINT. The SEG0~SEG23 lines can be can be chosen to be either segment driv- ers or CMOS outputs using control bits in the LCD control registers. COM0~COM2 COM3/SEG40 O ¾ COM0~COM2 are the LCD common outputs. A bit in the LCD Control Register determines if pin COM3/SEG40 is configured as a segment driver or as a common output driver. HT56R642 VLCD I ¾ LCD bias pin - must less than or equal to VDD SEG0~SEG9 SEG10/SDO SEG11/SDI/SDA SEG12/SCK/SCL SEG13/SCS SEG14/PCLK SEG15/PINT COM15/SEG16~ COM8/SEG23 O O I/O I/O I/O O I/O O SIM PINT SEG0~SEG15 are LCD driver outputs for LCD panel segments. SEG10 is pin-shared with the SPI bus data output line, SDO. SEG11 is pin-shared with the SPI bus data input line, SDI and the I 2C Bus data line SDA. SEG12 is pin-shared with the SPI bus clock line, SCK and the I 2C Bus clock line SCL. SEG13 is pin-shared with the SPI bus select line, SCS. SEG14 is pin-shared with the Peripheral Clock line, PCLK. SEG15 is pin-shared with the Peripheral Interrupt line, PINT. The SEG0~SEG15 lines can be can be chosen to be either segment driv- ers or CMOS outputs using control bits in the LCD control registers. COM0~COM7 O ¾ COM0~COM7 are the LCD common outputs. HT56R62/HT56R65 HT56R642/HT56R644/HT56R654/HT56R656 Rev. 1.00 6 July 20, 2009 |
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