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HT82M9AE 数据表(PDF) 21 Page - Holtek Semiconductor Inc |
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HT82M9AE 数据表(HTML) 21 Page - Holtek Semiconductor Inc |
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21 / 46 page ![]() HT82M9AE/HT82M9AA Rev. 1.90 21 October 21, 2009 signal to the device. The timing is as follows: Configuring the Device as a PS2 Device The HT82M9AE/HT82M9AA can be defined as a USB interface or a PS2 interface by configuring the SPS2 (bit 4 of the USR) and SUSB (bit 5 of the USR). If SPS2=1, and SUSB=0, the HT82M9AE/HT82M9AA is defined as PS2 interface, pin USBD- is now defined as PS2 Data pin and USBD+ is now defined as PS2 Clk pin. The user can easily read or write to the PS2 Data or PS2 Clk pin by accessing the corresponding bit PS2DAI (bit 4 of the USC), PS2CKI (bit 5 of the USC), PS2DAO (bit 6 of the USC) and S2CKO (bit 7 of the USC) respectively. The user should make sure that in order to read the data properly, the corresponding output bit must be set to ²1². For example, if user wants to read the PS2 Data by reading PS2DAI, the PS2DAO should be set to ²1². Oth- erwise it always read a ²0². If SPS2=0, and SUSB=1, the HT82M9AE/HT82M9AA is defined as a USB interface. Both the USBD- and USBD+ are driven by the USB SIE of the HT82M9AE/HT82M9AA. User only writes or reads the USB data through the corresponding FIFO. Both SPS2 and SUSB default is ²0². S U S P E N D U S B R e s u m e S i g n a l U S B _ I N T R M W K M i n . 2 . 5 m s M i n . 1 U S B C L K I/O Port Special Registers Definition · Port-A (12H) - PA Bit No. Label Read/Write Option Functions 0~3 PA0~PA3 R/W ¾ I/O (R/W) has pull-low and pull-high option. Has falling edge wake-up option. 4~6 PA4~PA6 R/W ¾ I/O (R/W) has pull-high option. Has falling edge wake-up option. 7 PA7 R/W ¾ I/O (R/W) has pull-high option. Has falling edge wake-up option, pin-shared with timer input pin. PA (12H) Register · Port-A Control (13H) - PAC This port configure the input or output mode of Port-A · Port-B Control (14H) - PB Bit No. Label Read/Write Option Functions 0 PB0 R/W ¾ I/O (R/W), has pull-high option 1 PB1 R/W ¾ I/O (R/W), has pull-high option 2 PB2 R/W ¾ I/O (R/W), has pull-low and pull-high option 3 PB3 R/W ¾ I/O (R/W), has pull-low and pull-high option 4 PB4 R/W ¾ I/O (R/W), has pull-high option, can wake-up 5 PB5 R/W ¾ I/O (R/W), has pull-high option 6 PB6 R/W ¾ I/O (R/W), has pull-high option 7 PB7 R/W ¾ I/O (R/W), has pull-high option, can wake-up PB (14H) Register · Port-B Control (15H) - PBC This port configures the input or output mode of Port-B for I/O mode |
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