Pin Description

Pin Name

I/O

ROM Code

Option

Description

PA0~PA7

I/O

Pull-high

Pull-low

Wake-up

CMOS/NMOS/PMOS

Bidirectional 8-bit input/output port. Each bit can be configured as a

wake-up input by ROM code option. The input or output mode is con-

trolled by PAC (PA control register).

Pull-high resistor options: PA0~PA7

Pull-low resistor options: PA0~PA3

CMOS/NMOS/PMOS options: PA0~PA7

Falling edge wake-up options: PA0~PA1, PA4~PA7

Rising and falling edge wake-up options: PA2~PA3

PB0~PB7

I/O

Pull-high

Pull-low

Wake-up

Bidirectional 8-bit input/output port. Software instructions determine the

CMOS output or Schmitt trigger input with pull-high resistor (determined

by pull-high options).

Pull-high resistor options: PB0~PB7

Pull-low resistor for options: PB2, PB3

Falling edge wake-up options: PB4, PB7

VSS

¾¾

Negative power supply, ground

RES

I

¾

Schmitt trigger reset input. Active low.

VDD

¾¾

Positive power supply

V33O

O

¾

3.3V regulator output

USBD+/CLK

I/O

¾

USBD+ or PS2 CLK I/O line

USB or PS2 function is controlled by software control register

USBD-/DATA

I/O

¾

USBD- or PS2 DATA I/O line

USB or PS2 function is controlled by software control register

OSCI

OSCO

I

O

¾

OSCI, OSCO are connected to a 6MHz or 12MHz crystal/resonator (de-

termined by software instructions) for the internal system clock.

Absolute Maximum Ratings

Storage Temperature ............................

-50°Cto125°C

Operating Temperature...............................0

°Cto70°C

-100mA

Total Power Dissipation .....................................500mW

Note: These are stress ratings only. Stresses exceeding the range specified under

²Absolute Maximum Ratings² may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed

in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.

HT82M9AE/HT82M9AA

Rev. 1.90

3

October 21, 2009