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AS1100PL 数据表(PDF) 7 Page - ams AG

部件名 AS1100PL
功能描述  Serially Interfaced, 8-Digit LED Driver
PDF  17 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS1100PL 数据表(HTML) 7 Page - ams AG

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Revision 1.33
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AS1100
Data Sheet - D e t a i l e d D e s c r i p t i o n
Initial Power-Up
After powering up the system all register are reset, so that the display is blank. The AS1100 starts the shutdown mode.
All registers should be programmed for normal operation. The default settings enable only scan of one digit, the
internal decoder is disabled, data register and intensity register are set to the minimum value.
Decode-Mode Register
In the AS1100 a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code
consists of the numbers 0-9, E,H, L,P and -. In register 09h a logic high enables the decoder for the appropriate digit.
In case that the decoder is bypassed (logic low) the data Bits D7-D0 correspond to the segment lines of the AS1100. In
Table 7 some possible settings for register 09h are shown. Bit D7, which corresponds to the decimal point, is not
affected by the settings of the decoder. Logic high means that the decimal point is displayed. In Table 8 the font of the
Code B decoder is shown. In Table 9 the correspondence of the register to the appropriate segments of a 7 segment
display is shown (see Figure 6).
Intensity Control and Interdigit Blanking
Brightness of the display can be controlled in an analog way by changing the external resistor (RSET). The current,
which flows between VDD and ISET, defines the current that flows through the LEDs. The LED current is 100 times the
ISET current. The minimum value of RSET should be 9.53k
Ω, which corresponds to 40mA segment current. The
brightness of the display can also be controlled digitally via register 0Ah. The brightness can be programmed in 16
steps and is shown in Table 10. An internal pulse width modulator controls the intensity of the display.
Scan-Limit Register
The scan limit register 0Bh selects the number of digits displayed. When all 8 digits are displayed the update frequency
is typically 800Hz. If the number of digits displayed is reduced, the update frequency is reduced as well. The frequency
can be calculated using 8fOSC/N, where N is the number of digits. Since the number of displayed digits influences the
brightness, the resistor RSET should be adjusted accordingly. The Table 12 shows the maximum allowed current, when
fewer than 4 digits are used. To avoid differences in brightness the scan limit register should not be used to blank
portions of the display (leading zeros).
Table 5. Register address map
Register
Address
Hex
Code
D15-D12
D11
D10
D9
D8
No-Op
X
0000
0xX0
Digit 0
X
0001
0xX1
Digit 1
X
0010
0xX2
Digit 2
X
0011
0xX3
Digit 3
X
0100
0xX4
Digit 4
X
0101
0xX5
Digit 5
X
0110
0xX6
Digit 6
X
0111
0xX7
Digit 7
X
1000
0xX8
Decode Mode
X
1001
0xX9
Intensity
X
1010
0xXA
Scan Limit
X
1011
0xXB
Shutdown
X
1100
0xXC
Not used
X
1101
0xXD
Reset and ext. Clock
X
1110
0xXE
Display Test
X
1111
0xXF



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